Continuous miniaturization of semiconductor devices has been one of the main driving forces ensuring an outstanding increase of speed and performance of modern electronic circuits. Although devices fabricated at the 7nm technology node were reported, transistor scaling shows signs of saturation as single-thread performance and clock frequency cannot be increased further without a harmful active power penalty. Due to small device sizes and increasing leakage the stand-by power grows rapidly and becomes comparable to the devices’ active operation, which drastically increases the overall power consumption. Further contributing to the increasingly prohibitive power demand issue is the fact that in large-scale datacenters high active power is required, not only for efficient data processing but also for memory data transfer operations. Overall, the critical state of high power consumption is incompatible with the global demand for reducing it. Novel approaches are therefore desperately needed to sustain the vital societal and industrial progress using much more efficient solutions. Regarding stand-by power reduction, a highly attractive solution is to introduce non-volatility in the main computer memory and the caches. Placing non-volatile memory close to or on the processor dramatically reduces data transfer with long interconnects and the related power requirements. Regarding active power reduction, delegating, at least partially, data processing capabilities into the non-volatile memory paves the way for a new low power and high-performance computing paradigm. Magnetic tunnel junctions – as elements of non-volatile CMOS-compatible magnetoresistive memory – are excellent candidates for realizing both stand-by and active power reducing approaches, as they possess a simple structure, long retention time, high endurance and fast operation speed, and yield high integration density.

For an ultimate success of magnetoresistive memory it is particularly important to introduce it in the main computer memory and the caches. However, high switching currents and large writing energies compromise the advantages provided by non-volatility. Approaches to resolve the problem include perpendicular magnetic tunnel junctions, decoupling of write from read paths, controlling magnetization by voltage, and employing novel materials.

The success of microelectronics technology has been enabled and supported by sophisticated technology computer-aided design (TCAD) tools; however, TCAD support for magnetoresistive memory is entirely missing. The deficiency of models and simulators impedes the wide application of non-volatile technology. Together with Silvaco, we will primarily investigate magnetoresistive memory to facilitate its implementation in the main computer memory and the caches. In particular, our initial set of research problems will focus on issues regarding three-dimensional self-consistent simulations of spin currents, torques, and magnetization dynamics in structures with perpendicular magnetization. Furthermore, we will investigate microscopic models for magnetization control by voltage, spin-orbit torques, and current-driven domain wall motion induced switching in advanced devices. A part of the overall plan will be devoted to high-risk research in devising novel modeling and simulation approaches for non-volatile circuits with embedded logic functions for non-conventional logic-in-memory architectures: a potential revolutionary technology. The laboratory will develop the key simulation capabilities required for the success of magnetoresistive memory and will thereby act as a key player to shape the future generations of electronic devices.