Tibor Grasser
Ao.Univ.Prof. Dipl.-Ing. Dr.techn.,
Head of Institute
Publications

Biography

Prof. Tibor Grasser is an IEEE Fellow and currently head of the Institute for Microelectronics at Technische Universität Wien. He has edited various books, e.g. on the bias temperature instability (Springer) and hot carrier degradation (Springer), is a distinguished lecturer of the IEEE EDS, has been involved in outstanding conferences such as IEDM, IRPS, SISPAD, ESSDERC, and IIRW, is a recipient of the Best and Outstanding Paper Awards at IRPS (2008, 2010, 2012, and 2014), IPFA (2013 and 2014), ESREF (2008) and the IEEE EDS Paul Rappaport Award (2011). He currently also serves as an Associate Editor for Microelectronics Reliability (Elsevier).

Preface



Welcome to the Institute for Microelectronics’ 30th annual research review! Our permanent staff members, financed by the Austrian Federal Ministry of Education, Science and Research, have remained unchanged from last year and consist of eight full-time and four part-time employees: Five professors, two senior scientists, a secretary, and one part-time and one full-time technical assistant. In addition, one federally funded post-doctoral researcher and five doctoral researchers are working on exciting research problems. Furthermore, twenty-nine scientists and five post-doctoral researchers are presently funded through projects supported by our industrial partners, including the Austrian Science Fund (FWF), the Austrian Research Promotion Agency and the Christian Doppler Gesellschaft (CDG), as well as by projects within the European Commission Framework Programme.
Over the last year, one project funded by the Austrian Science Fund, namely “Comprehensive Physical Modeling of Hot-Carrier Induced Degradation” (COMPHOT), one “High Performance Quantum Transport Solver using Modular Supercomputing” project, funded by the Austrian Research Promotion Agency, and one project developed with the financial support of the European Research Council, namely “Non-Volatile Magnetic Flip Flop” (NOVOFLOP), have been successfully completed. The Information Society Technologies project, “Stability under Process Variability for Advanced Interconnects and Devices Beyond 7nm node” (SUPERAID7), and the CDG project on “High performance Technology CAD”, as well as four projects funded by the FWF, are proceeding according to plan.
We are very pleased that our industrial partners have continued and extended their support for projects related to noise in semiconductor devices, potentials and risks of pilot technologies for power semiconductors in terms of reliability, production and application, modeling of hot carrier degradation in Si-transistors, quantum mechanical simulation of tandem solar cells and mechanical properties of SOI layers, advanced MOSFET reliability characterization using array structures, and reliability analysis of driver boards. It is a great pleasure for us to report that one FWF project, namely “Defect-Based Modeling of SiC Devices”, and one “Innovative Communication Electronics for Aircraft Engines” project funded by FFG have also begun over the past year.
We are exceptionally proud of the high academic and scientific output that our Institute is producing. This is reflected in our respectable number of long-term projects and in our high number of publications, especially when it comes to contributing to and participating in international conferences. We are aware, however, that this success is based considerably on our cooperating partners within academia and industry. We would therefore like to explicitly express our gratitude for their trust in our scientific work. In this regard, we are entering into the next year of our Institute, as ever, with high expectations.