6.2.3.4 Dependence of C_G on T-Gate Cross Section

To investigate the influence of the gate cross section, different gate geometries were simulated by varying the two characteristic dimensions d_G and d_T. All calculations were performed for L_G = 220 nm and L_T = 820 nm except for the case of a rectangular gate as depicted in  Figure 6.36. One limiting case for the gate geometry is d_G = 0 (as shown in  Figure 6.33 and used for all simulations in Section 6.2 discussed up to here) whereas the other extreme is given by d_G = d_T ("ideal" T­gate cross section).
 

Figure 6.37 presents simulations of C_G and f_T as a function of d_G for a completely passivated device with d_T as a parameter. The closed circle in  Figure 6.37 designates measurement and simulation of the particular HEMT shown in  Figure 6.33. Here, a distinct T­gate stem does not exist (d_G = 0). According to  Figure 6.37, the f_T of this device could be increased from 53 GHz to a value close to 60 GHz if the gate cross section could be improved in a way that d_G changes from zero to 200 nm (d_G = d_T, ideal T­gate). Further increase of d_G and d_T would further improve f_T. Values of about 65 GHz are expected for d_G = d_T = 400 nm, without decreasing the gate length. In the case that d_G = 0 and only d_T = 400 nm (gate stem sidewalls and device surface enclose an angle of 53°), again f_T  60 GHz is expected, comparable to the case d_G = d_T = 200 nm.
 

Thus, it is of immense importance that the process technology is able to realize a gate cross section where the gate stem sidewalls are really perpendicular to the semiconductor surface (ideal T­gate). If the enclosed angle is significantly smaller than 90° (V­shaped gate stem), d_T has to be substantially greater compared to the perpendicular case if the same f_T has to be realized. The multi-resist level approach of most EBL processes facilitates the fabrication of such vertical T­gate stems as shown in  Figure 6.3. Gate technologies that use optical lithography are usually based on narrowing the comparatively large resist openings by spacers. They often have the property not to result in really vertical sidewalls as illustrated in  Figure 6.2. If such a technology is used for the fabrication of devices for high-frequency application, it is important that at least the part of the gate immediately adjacent to the semiconductor surface has perpendicular sidewalls.

A rectangular gate shape shown in  Figure 6.36 represents the limit for arbitrarily increased d_T and d_G. The C_G of a fully passivated device with a rectangular gate is indicated in  Figure 6.37 by the upper bold line and the C_G for a device without passivation by the lower bold line.

The upper limit in f_T is marked by the case of a rectangular gate and no passivation which decreases the total C_G to about 820 fF/mm and increases f_T to 88 GHz. Both rectangular gate and no passivation are rather unpractical limits although they can be realized as reported in [75]. The disadvantage of a rectangular gate is a significant increase in the gate resistance R_G. This becomes especially important for devices with long gate fingers such as power devices and for extremely high frequencies of up to 100 GHz were the skin effect becomes significant.

Based on the results presented so far the following considerations on the optimization of the RF performance of the HEMT investigated here can be made. A reduction of the gate length from 220 nm to 120 nm would reduce C_G by 320 fF/mm. The drawback would be a larger g₀. As shown in Section 6.1.2 for the single heterojunction HEMT g₀ increases by 100 % to 30 mS/mm which is still an acceptable value. In addition a single heterojunction HEMT is a worst case assumption because it is expected that short channel effects are more severe due to the lower barrier height under the channel compared to a double heterojunction HEMT.

A realistic optimization of the T­gate shape with d_G = 150 nm and d_T = 300 nm would yield a reduction of C_G of 210 fF/mm. This reduces A₂ of (62) from 85 fF/mm to about 55 fF/mm such that a reduction of the passivation thickness would have a reduced impact. For a realistic reduction from 700 nm to a residual passivation thickness of 200 nm a reduction in C_G by about 70 fF/mm can be expected. These improvements together sum up to a reduction C_G from 1.38 pF/mm to about 0.8 pF/mm which translates into f_T = 92 GHz.

This shows that to practically increase f_T to significantly over 100 GHz a higher g_m is necessary. This can be achieved in first place by a smaller gate-to-channel separation. Unfortunately this goes along with an increase in C_G due to an increase in A₃ of (62). But even if the quotient of g_m/A₃ would remain constant this would still increase f_T due to the parasitic capacitance which are unchanged by a reduction of d_GC. A detailed investigation on the optimization of the RF performance of double heterojunction HEMTs will be given in the following section.
 

• 6.3 Millimeter Wave HEMTs
• 6.3.1 DC Characteristics
• 6.3.1.1 Dependence on the Gate-to-Channel Separation
• 6.3.1.2 Dependence on the Gate Length
• 6.3.2 RF Performance
• 6.3.2.1 Dependence on the Gate Length
• 6.3.2.2 Contributions to the Gate Capacitance
• 6.3.2.3 Dependence of f_T on d_GC
• 6.3.2.4 Dependence of f_T and f_max on L_R
• 6.3.2.5 Dependence on the Passivation Thickness
• 6.3.3 Optimization of Millimeter Wave HEMTs
• 6.4 Comparison between Low Noise, Power, and Millimeter Wave HEMTs
• 6.5 Influence of Backside Doping on the C_G(V_GS) Characteristics