For device simulations, the demands on grid generators are very high. Coming along with the growing complexity and miniaturization of the devices two-dimensional models are often not sufficient. These models cannot describe parasitic effects near corners of the structures. Due to the shrinking aspect ratios of the devices, the limited device extension along the third coordinate direction cannot be neglected. However, these parasitic effects are able to change the device characteristics dramatically. Neglecting the third dimension can even cause an invalid simulation result. Therefore, the models must be extended to three dimensions and also three-dimensional simulation grids have to be used.
Simple electric field calculations or their assigned capacitance, inductance and resistance calculations of interconnect structures show a relatively well-tempered behavior. The underlying differential equations are often linear, such as the Laplace equation. Additional nonlinearities such as a temperature-dependent resistance can be handled by post-iterations: The simulation is started with an initial value of the temperature dependent resistance. After evaluation of the current densities, the heating of the device regions is calculated, which changes the specific resistance. These new values will be inserted in the next field evaluation. This procedure is continued until the resistance, current density, and temperature do not change significantly. The prerequisites on the meshes are not very high, already relatively crude grids will deliver good results. Only the convergence of the solvers must be guaranteed by the mesh type in combination with the discretization method. In contrast, within electric calculations of semiconductor devices the demands on the grids grow rapidly, because semiconductor equations are highly nonlinear and show a strong coupling; this basically due to the exponential dependence of the carrier concentration on the potential.
