Own Publications

1

F. Jiménez-Molinos, A. Palma, A. Gehring, F. Gámiz, H. Kosina, and S. Selberherr, "Static and Transient Simulation of Inelastic Trap-Assisted Tunneling," in Proc. 14$^{th}$ Workshop on Modeling and Simulation of Electron Devices, (Barcelona, Spain), pp. 65-68, October 2003.

2

A. Gehring, S. Harasek, E. Bertagnolli, and S. Selberherr, "Evaluation of ZrO$_2$ Gate Dielectrics for Advanced CMOS Devices," in Proc. European Solid-State Device Research Conf., (Estoril, Portugal), pp. 473-476, September 2003.

3

T. Ayalew, J.-M. Park, A. Gehring, T. Grasser, and S. Selberherr, "Silicon Carbide Accumulation-Model Laterally Diffused MOSFET," in Proc. European Solid-State Device Research Conf., (Estoril, Portugal), pp. 581-584, September 2003.

4

E. Ungersböck, A. Gehring, H. Kosina, S. Selberherr, B.-H. Cheong, and W. B. Choi, "Simulation of Carrier Transport in Carbon Nanotube Field Effect Transistors," in Proc. European Solid-State Device Research Conf., (Estoril, Portugal), pp. 411-414, September 2003.

5

T. Ayalew, A. Gehring, J.-M. Park, T. Grasser, and S. Selberherr, "Improving SiC Lateral DMOSFET Reliability under High Field Stress," Microelectron.Reliab., vol. 43, no. 9-11, pp. 1889-1894, 2003.

6

T. Ayalew, J.-M. Park, A. Gehring, T. Grasser, and S. Selberherr, "Modeling and Simulation of SiC MOSFETs," in Proc. IASTED Intl. Conf. on Applied Simulation and Modeling, (Marbella, Spain), pp. 552-556, September 2003.

7

A. Gehring, F. Jiménez-Molinos, H. Kosina, A. Palma, F. Gámiz, and S. Selberherr, "Modeling of Retention Time Degradation Due to Inelastic Trap-Assisted Tunneling in EEPROM Devices," Microelectron.Reliab., vol. 43, no. 9-11, pp. 1495-1500, 2003.

8

A. Gehring, T. Grasser, H. Kosina, and S. Selberherr, "Energy Transport Gate Current Model Accounting for Non-Maxwellian Energy Distribution," Electron.Lett., vol. 39, no. 8, pp. 691-692, 2003.

9

A. Gehring, H. Kosina, and S. Selberherr, "Analysis of Gate Dielectric Stacks Using the Transmitting Boundary Method," in Proc. Intl. Workshop on Computational Electronics, (Rome, Italy), May 2003.

10

A. Gehring, H. Kosina, T. Grasser, and S. Selberherr, "Consistent Comparison of Tunneling Models for Device Simulation," in Proc. 4th European Workshop on Ultimate Integration of Silicon, (Udine, Italy), pp. 131-134, March 2003.

11

A. Gehring, T. Grasser, H. Kosina, and S. Selberherr, "An Energy Transport Gate Current Model Based on a Non-Maxwellian Energy Distribution," in Proc. Nanotech 2003 Vol. 2, (San Francisco, USA), pp. 48-51, February 2003.

12

A. Gehring, H. Kosina, and S. Selberherr, "Transmission Coefficient Estimation for High-$\kappa$ Gate Stack Evaluation," in Proc. Advances in Simulation, Systems Theory and Systems Engineering, (Skiathos, Greece), pp. 156-159, September 2002.

13

A. Gehring, T. Grasser, H. Kosina, and S. Selberherr, "A New Gate Current Model Accounting for a Non-Maxwellian Electron Energy Distribution Function," in Proc. Simulation of Semiconductor Processes and Devices, (Kobe, Japan), pp. 235-238, September 2002.

14

A. Gehring, T. Grasser, H. Kosina, and S. Selberherr, "Simulation of Hot-Electron Oxide Tunneling Current Based on a Non-Maxwellian Electron Energy Distribution Function," J.Appl.Phys., vol. 92, no. 10, pp. 6019-6027, 2002.

15

A. Gehring, T. Grasser, B.-H. Cheong, and S. Selberherr, "Design Optimization of Multi-Barrier Tunneling Devices Using the Transfer-Matrix Method," Solid-State Electron., vol. 46, no. 10, pp. 1545-1551, 2002.

16

T. Grasser, A. Gehring, and S. Selberherr, "Macroscopic Transport Models for Microelectronics Devices," in Proc. Sixth World Multiconf. on Systemics, Cybernetics and Informatics, (Orlando, Florida), pp. 1-8, July 2002.

17

T. Grasser, A. Gehring, and S. Selberherr, "Recent Advances in Transport Modeling for Miniaturized CMOS Devices," in Proc. Intl. Caracas Conf. on Devices, Circuits and Systems, (Aruba, Dutch Caribbean), pp. 1-8, April 2002.

18

A. Gehring, T. Grasser, and S. Selberherr, "Non-Parabolicity and Non-Maxwellian Effects on Gate Oxide Tunneling," in Proc. Intl. Conf. on Modeling and Simulation of Microsystems, (San Juan, Puerto Rico), pp. 560-563, April 2002.

19

A. Gehring, F. Jiménez-Molinos, A. Palma, F. Gamiz, H. Kosina, and S. Selberherr, "Simulation of Non-Volatile Memory Cells by Accounting for Inelastic Trap-Assisted Tunneling Current," in Proc. 3rd European Workshop on Ultimate Integration of Silicon, (Munich, Germany), pp. 15-18, March 2002.

20

A. Gehring, T. Grasser, and S. Selberherr, "Design Optimization of Multi-Barrier Tunneling Devices Using the Transfer-Matrix Method," in Proc. Intl. Semiconductor Device Research Symposium, (Washington D. C.), pp. 260-263, December 2001.

21

A. Gehring, C. Heitzinger, T. Grasser, and S. Selberherr, "TCAD Analysis of Gain Cell Retention Time for SRAM Applications," in Proc. Simulation of Semiconductor Processes and Devices, (Athens, Greece), pp. 416-419, September 2001.

22

A. Gehring, M. Steinbauer, I. Gaspard, and M. Grigat, "Empirical Channel Stationarity in Urban Environments," in Proc. European Personal Mobile Communications Conf., (Vienna, Austria), February 2001.

23

J. Bröker, A. Gehring, and T. Sauter, "Simulation und Analyse von Single-Clock CMOS Flip-Flops," in Proc. Austrochip 2000, (Graz, Austria), pp. 61-70, October 2000.

24

A. Gehring and T. Neubauer, "Effect of Base Station Location on the Transmission Power Levels of an Indoor TDD System," in COST 259 TD 00, (Bergen, Norway), April 2000.

Table 8: Publication Statistics.

	Author	Co-Author	Total
Journals	4	1	5
Conferences	12	7	19
Total	16	8	24

A. Gehring: Simulation of Tunneling in Semiconductor Devices