Modeling Unconventional Nanoscaled Device FABrication

Because of power, energy, and cost reasons, a further development of big data and mobility applications as well as the Internet of Things will require continued Power-Performance-Area-and-Cost (PPAC, formerly More Moore) scaling. This is predicted to lead within less than a decade to a paradigm change towards the 3D sequential integration of nanosized

structures. While technology-computer aided design (TCAD) is ndispensable now particularly for the early stages of industrial research and development, we face the situation that classical continuum tools lose their predictivity when going towards the nano world and towards the very low temperature processes required for 3D sequential integration. They are

then neither able to predict the reduced electrical activation of dopants, nor topography effects like faceting, nor defect formation and growth. Accordingly, the NEREID NanoElectronics Roadmap for Europe explicitly requests to “…develop new tools taking into account all the new materials, technologies and device architectures…” To overcome the insufficient state of models and tools for a predictive simulation of low-temperature processing of high-mobility layers like silicon-germanium alloys, dedicated experimental investigations will be performed for solid-phase epitaxial regrowth, epitaxial deposition, and nanosecond laser annealing. Model development will be based whenever possible on the KMC and LKMC tools of Sentaurus Process, complemented by model development with own tools only when the functionality of commercial products is not sufficient. Own tools will be looped into the Sentaurus TCAD workflow so that in the end we will for the first time present a complete calibrated toolchain able to simulate the virtual fabrication of the3D sequential integration of nanoscaled devices. This will allow continuing further on the success story of the use of TCAD for the early development of the next generations of unconventional nanoscaled electron devices.