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5.1.2.2 Effect of the Substrate Doping on the Channel Tunneling

Fig. 5.4 shows the electron and hole tunneling current density for different doping of the substrate. With increasing substrate doping, the majority tunneling component (electrons in the nMOS, holes in the pMOS) is reduced in both the nMOS and pMOS devices, while the minority component increases.
Figure 5.4: Electron (left) and hole (right) current density in an nMOS (top) and a pMOS (bottom) with different doping of the substrate. Gate polysilicon doping is 5e20 cm-3, dielectric thickness is 2 nm.
\includegraphics[width=.49\linewidth]{figures/polyNmosElectronsSubstrate} \includegraphics[width=.49\linewidth]{figures/polyNmosHolesSubstrate}
\includegraphics[width=.49\linewidth]{figures/polyPmosElectronsSubstrate} \includegraphics[width=.49\linewidth]{figures/polyPmosHolesSubstrate}


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A. Gehring: Simulation of Tunneling in Semiconductor Devices