Subsections

5.1.1 AlGaN/GaN Devices

All of the measured AlGaN/GaN devices share some basic properties like identical substrate, layer sequence, and material quality. However, there are differences in the general geometry and AlGaN layer composition in the particular structures. As an illustration of the device surface geometry a scanning electron microscopy (SEM) image is shown in Fig. 5.1. The top metalization is the gate, the middle one is the source, and the bottom one is the drain. The active transistor area is the shallow channel between the source and drain metalization, with the thin gate electrode running along. In this figure two transistors are shown.

Figure 5.1: SEM image of two HEMTs (IAF Freiburg).
\includegraphics[width=10cm]{figures/sim/hemt/REMb.eps}


5.1.1.1 Device Structures

The AlGaN/GaN HEMT technology is based on multi-wafer Metal Oxide Chemical Vapor Deposition (MOCVD) growth on 3-inch semi-insulating SiC substrates. The gate is e-beam defined with different gate lengths ( $ L_\ensuremath {\mathrm {g}}$=0.25 $ \mu$m, 0.5 $ \mu$m, and 0.6 $ \mu$m). Device isolation is achieved by mesa isolation. An Al$ _x$Ga$ _{1-x}$N/GaN heterointerface is grown on top of a thick insulating GaN buffer. All layers are unintentionally doped except for the supply layers in some of the devices. A metal diffusion of the metal source and drain contacts reaching into the channel is assumed. The positive charge (introduced by polarization effects) at the channel/barrier interface is compensated by a commensurate negative surface charge at the barrier/cap interface. The charge density values for the three devices are listed in Table 5.1. Using the methodology as described in Section 4.5 theoretical values of 1.7$ \times $10$ ^{13}$ cm$ ^{-2}$ and 1.2$ \times $10$ ^{13}$ cm$ ^{-2}$ for the Al$ _{0.3}$Ga$ _{0.7}$N/GaN interface and Al$ _{0.22}$Ga$ _{0.78}$N/GaN interface, respectively, are calculated. However, in real devices several effects such as dislocations and surface states reduce the total sheet charge. Thus, lower values are used in the simulations, adapted in order to achieve a density similar to the one extracted from Hall measurements.


Table 5.1: Charge density [cm$ ^{-2}$] for three AlGaN/GaN HEMTs.
  Device A Device B Device C
channel/barrier $ 1.14\times$10$ ^{13}$ $ 1.22\times$10$ ^{13}$ $ 0.94\times$10$ ^{13}$
barrier/cap $ -0.4\times$10$ ^{13}$ $ -0.4\times$10$ ^{13}$ $ -0.25\times$10$ ^{13}$
cap/passivation $ -0.4\times$10$ ^{13}$ $ -0.4\times$10$ ^{13}$ $ -0.4\times$10$ ^{13}$

For good control of the sheet carrier concentration in the two-dimensional electron gas (2DEG), the alloy composition and the abruptness of the AlGaN/GaN interface has to be determined. Various methods such as high resolution X-ray diffraction, transmission electron microscopy, and elastic recoil detection have been used [358,366,367]. A good estimate of the effective channel thickness of the conducting region is required for the simulator. A nominal value for the thickness of the 2DEG region has been found in the literature to be in the order of 2$ -$3 nm, see e.g. [368], depending on the Al mole fraction in the AlGaN layer. However, the effective thickness of the conducting region may be wider than the 2DEG, albeit with a lower density. For the purpose of calibrating the simulator to produce the same current density as in the measured devices, various effective thicknesses of the defect-free conducting GaN layer were analyzed. A value of 50 nm was used in all simulations throughout this chapter. Self-heating effects are accounted for by using a properly adapted ambient temperature. The barrier height of the Schottky contact to GaN was experimentally determined to be 1.0 eV at room temperature in agreement with experiments by other groups [273].

Devices from three different HEMT generations are measured and simulated: first a device with field-plate structure (Device A), next a device with shield-plate structure (Device B), and last a state of the art device with T-gate only (Device C) [4]. The layer properties are summarized in Table 5.2 and the geometry is shown in Fig. 5.2.


Table 5.2: Layer properties.
  Device A Device B Device C
barrier thickness [nm] 17 17 22
Al composition [%] 30 30 22
$ \delta$ doping yes yes no
cap thickness [nm] 5 5 3

Figure 5.2: Schematic layer structure.
\includegraphics[width=12cm]{figures/sim/hemt/3Gen.eps}

Device A has gate length $ L_{\mathrm{g}} =0.6 \mu\ensuremath{\mathrm{m}}$, field-plate extension length $ L_\ensuremath {\mathrm {FP}}$=0.6 $ \mu$m, and gate width 100 $ \mu$m. The Al composition in the AlGaN supply layer is 30%. The latter is $ \delta$-doped in order to provide additional carriers and to improve access resistance. Contact resistances of 4 $ \Omega$ mm are assumed.

Device B is a $ L_{\mathrm{g}} =0.5 \mu\ensuremath{\mathrm{m}}$ device featuring a source shield-plate. The gate is T-shaped. The Al composition in the barrier layer is 30% with a $ \delta$ doping, too.

The last device has a T-shaped gate with $ L_{\mathrm{g}} =0.25 \mu\ensuremath{\mathrm{m}}$ and a gate width $ W_\ensuremath{\mathrm{g}}$=2$ \times $50 $ \mu$m (taken as 1$ \times $100 $ \mu$m in the simulations). The Al composition in the supply layer is 22%, contact resistance is 0.2 $ \Omega$mm.

5.1.1.2 Simulation Results

Using the same setup the three generations of AlGaN/GaN based HEMTs are simulated and the results are compared to experimental data. In the following the results are discussed.

Device A:

Fig. 5.3 compares the measured transfer characteristics ( $ V_\ensuremath {\mathrm {DS}}$=12 V) with the simulations using the two models described in Section 4.4.3. Both setups provide a good agreement. The minor overestimation of the drain current at high gate voltage is due to either gate leakage or real-space transfer [370]. HD Model B (Section 4.4.3) delivers a slightly higher drain current. The reason is a small difference in the velocity characteristics at very low electric fields ($ <$50 kV/cm), which, however, are crucial for the steady state transport. Fig. 5.4 shows the output characteristics. Again an overall good agreement is achieved with a pronounced self-heating effect at high gate voltages.

Figure 5.3: Comparison of measured and simulated transfer characteristics (Device A).
\includegraphics[width=10cm]{figures/sim/hemt/TransD1.eps}

Figure 5.4: Comparison of measured and simulated output characteristics (Device A).
\includegraphics[width=10cm]{figures/sim/hemt/OutD1.eps}

Device B:

The transfer characteristics is measured at $ V_\ensuremath {\mathrm {DS}}$=12 V but also at $ V_\ensuremath {\mathrm {DS}}$=50 V. Fig. 5.5 compares the experiment with simulations, where the results agree very well. The corresponding output curves are provided in Fig. 5.6.

Figure 5.5: Comparison of measured and simulated transfer characteristics (Device B).
\includegraphics[width=10cm]{figures/sim/hemt/TransD3.eps}

Figure 5.6: Comparison of measured and simulated output characteristics (Device B).
\includegraphics[width=10cm]{figures/sim/hemt/OutD3.eps}

Device C:

Fig. 5.7 compares the measured transfer characteristics at $ V_\ensuremath {\mathrm {DS}}$=7 V with simulations. The results achieved with electron mobility Model A match slightly better, however the model delivers a lower current at low $ V_\ensuremath {\mathrm {DS}}$ than measured (Fig. 5.8). One possible reason is a higher electron velocity at lower fields in the real device due to low dislocation scattering effects.

Figure 5.7: Comparison of measured and simulated transfer characteristics (Device C).
\includegraphics[width=10cm]{figures/sim/hemt/TransD4.eps}

Figure 5.8: Comparison of measured and simulated output characteristics (Device C).
\includegraphics[width=10cm]{figures/sim/hemt/OutD4.eps}

AC simulations are performed to compare the calculated and experimental figures of merit e.g. cut-off and maximum frequency. Fig. 5.9 shows the measured and simulated cut-off frequency $ f_\ensuremath {\mathrm {t}}$ (again at $ V_\ensuremath {\mathrm {DS}}$=7 V). In order to account for the parasitics introduced by the measurement equipment, the intrinsic parameters obtained in the simulation are transformed using a standard two-port pad parasitic equivalent circuit. Both models provide a very good agreement with the experiment.

Figure 5.9: Comparison of measured and simulated cut-off frequency (Device C).
\includegraphics[width=10cm]{figures/sim/hemt/FtD4.eps}

Fig. 5.10 compares the measured and simulated (using Model B) extrinsic S-parameters at $ V_\ensuremath {\mathrm {GS}}$$ =-1.5$ V and $ V_\ensuremath {\mathrm {DS}}$$ =7$ V. An excellent agreement is achieved for all parameters in the frequency range 100 MHz$ -$26 GHz.

Figure 5.10: Comparison of measured and simulated S-parameters (Device C).
\includegraphics[width=10cm]{figures/sim/hemt/SparD4.epsi}

The electron transport in the channel under the gate is studied at the same bias point. As the electric field reaches its maximum under the drain side of the gate [371], the peak of the electron temperature is also found there (the gate edge is at $ x=2.25$ $ \mu$m in Fig. 5.11). Consequently, in the same region a pronounced velocity overshoot is observed. Interestingly, temperature and velocity profiles obtained using both models do not differ significantly.

Figure 5.11: Simulated electron temperature and velocity along the channel.
\includegraphics[width=11cm]{figures/sim/hemt/Tempnnn.eps}


S. Vitanov: Simulation of High Electron Mobility Transistors