Both SiC UMOSFET and DMOSFETs suffer from surface problems such as step-bunching and
non-uniform doping density [182]. Several groups have shown that incorporating an
n-type counter-doped layer along the oxide/semiconductor interface restores the channel
mobility in both types of transistors. One version of this structure, known as an
accumulation-channel FET or ACCUFET, was demonstrated in the vertical DMOSFET geometry by
Shenoy et al. [183] and in the UMOSFET geometry by Hara et
al. [184].
SiC lateral DMOSFETs are attractive for monolithic integration
with low voltage logic components in form of power IC; however, their design is more
challenging due to the surface problems mentioned above. This section presents an ACCUFET
structure for lateral DMOSFET which improves these problems. A simulation based analysis on
the performance and reliability of this structure compared to the conventional device has been
performed.
Subsections