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The fabrication of integrated circuits consists basically of the following process steps:
- Lithography: The process for pattern definition by applying thin uniform layer of viscous liquid (photo-resist) on the wafer surface. The photo-resist is hardened by baking and than selectively removed by projection of light through a reticle containing mask information.
- Etching: Selectively removing unwanted material from the surface of the wafer. The pattern of the photo-resist is transferred to the wafer by means of etching agents.
- Deposition: Films of the various materials are applied on the wafer. For this purpose mostly two kind of processes are used, physical vapor deposition (PVD) and chemical vapor deposition (CVD).
- Chemical Mechanical Polishing: A planarization technique by applying a chemical slurry with etchant agents to the wafer surface.
- Oxidation: In the oxidation process oxygen (dry oxidation) or H
O (wet oxidation) molecules convert silicon layers on top of the wafer to silicon dioxide.
- Ion Implantation: Most widely used technique to introduce dopant impurities into semiconductor. The ionized particles are accelerated through an electrical field and targeted at the semiconductor wafer.
- Diffusion: A diffusion step following ion implantation is used to anneal bombardment-induced lattice defects.
Models describing the steps used in fabricating ICs have also been incorporated into process simulators.
It is therefore quite possible today to ``build'' new semiconductor structures and predict their performance using these computer tools.
The state of the art in such simulators is that they are indeed very useful, but can not completely replace real laboratory experiments, because the models used in the simulators are not complete in some cases, or are purely empirical in other cases.
As the models are improved with ongoing research, the simulators will become more robust and therefore more generally useful. There is great motivation to do this, because real laboratory experiments are very expensive and very time consuming, especially as chip technology continuates to advance.
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H. Ceric: Numerical Techniques in Modern TCAD