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The strained Si technologies discussed so far assumed the standard (100)
Si substrate for improving the carrier mobilities. Since the carrier
mobilities are dependent on the crystal orientation of the substrate as well as
the direction of the channel [Momose02], the mobilities can be further
enhanced by adopting different substrate orientations and channel
directions. Maximum benefit in CMOS performance can be drawn when the nMOS and
pMOS transistors are grown on (100) and (110) substrate orientations,
respectively, with [110] as the channel direction. Combining the benefits of
this hybrid orientation technology (HOT) on SOI with the stress induced from
processing steps, significant improvements in pMOS mobility has been
reported [Yang06].
Another promising strained Si technology suggested recently [Issacson06] is
strained Si on Si (SSOS). In this technique, a strained Si layer is
formed directly on relaxed Si without any intermediate SiGe or oxide
layers. Due to the removal of the oxide layer from the process, the thermal
conductivity near the active regions of the device is significantly
improved. The strain here is created purely from the homochemical
heterojunction between strained Si and unstrained Si and not due to any
compositional changes.
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Next: 3. Strain Effects on
Up: 2. Strained Si Technology
Previous: 2.3 External Mechanical and
S. Dhar: Analytical Mobility Modeling for Strained Silicon-Based Devices