This section discusses the models introduced in this chapter with respect to their ability to meet the constraints of device simulation.
The use of ferroelectric materials in highly integrated circuits has a comparatively short history. Up to date no canonic device structure has been found and the designs are in a steady flow of modifications. One goal of this thesis was to design a tool capable of dealing with the actual questions concerning ferroelectric devices, but also extendable for any future developments. This demands a real two-dimensional treatment of the ferroelectric properties.
The SPICE based approaches are very fast, but the weak point of the concept is its inflexibility. Any change of the shape of the hysteresis, e.g., requires the development of a different model circuit. Furthermore, analysis which includes any geometry dependence is far out of reach.
At first glance this also seems to be the case for the Preisach hysteresis, which would mean that only the lattice models would remain as objects for implementation. Unfortunately, this approach suffers from various disadvantages.
First, the numerical effort and the complexity of the problem are not related. For simple one-dimensional problems, e.g., a whole lattice of sufficient size has to be calculated, while a compact model only demands the solution of an analytic equation. Another drawback of the lattice method is that simulation of distorted lattices is only possible when an actual distortion or variation of the parameters is added to the equation set, which will increase the complexity of the simulation and, even more unpleasantly, the setup of the simulation input. In addition the properties of the impurities inside a device are not included in the default material data sheet. Thus when using this approach some distribution function of the coupling parameters would have to be fitted in order to reproduce any measured hysteresis loop. Obviously such behavior does not increase the appeal of the model for device simulation, especially considering the fact that the reproduction of any measured hysteresis loop does not need a lot of fitting effort if a compact model is used.
No principle difficulty, but also unpleasant is the fact that lattice models employ a specific numerical concept. It is possible to include their simulation approach into a two-dimensional device simulator, but the different numerical concept will lead to very long simulation times, as the equation system for the ferroelectric material will have to be solved decoupledly from the semiconductor equations.
More appropriate for device simulation is a model that combines the speed of a compact model for simple tasks with the ability to calculate general two-dimensional problems and uses the same numerical concept as state-of-the-art device simulators, the box integration method. This can be achieved by application of an extended two-dimensional compact model to the material equations of the device simulator. Consequently, the Preisach hysteresis model, being the most accurate compact model, was selected for the implementation into the device simulator MINIMOS-NT.