1.1 Semiconductor Process Technology

Starting with a raw silicon wafer, many processing steps are necessary to obtain a final structure with the desired properties. The main processing steps used for ICs and MEMS manufacturing are listed in the following.

Lithography

processing steps define patterns on the surface. The standard procedure transfers the mask information to the wafer surface, coated with a photoresist, using optical imaging. A final development step removes exposed regions of the photoresist.

Etching

processes are used to remove material from the wafer. One can distinguish between wet and dry etching processes using liquid or gaseous etching agents, respectively. The first are characterized by isotropic uniform or crystallographic direction dependent etch rates, while the latter also allow directional etching. Therefore, to transfer patterns defined by the photoresist onto the wafer surface, dry etching processes are mainly used today.

Deposition

of new material layers is essential for creating insulators, conductors, or n- and p-type semiconductors. It is possible to categorize deposition processes into physical vapor deposition (PVD) and chemical vapor deposition (CVD) processes depending on the primary mechanism used to add a material to the surface. In the first case, this is condensation of the corresponding vaporized material. In the second case, the underlying mechanism is a chemical reaction at the surface.

Chemical-mechanical planarization

is used to flatten an irregular wafer surface. The combination of a chemical slurry with mechanical polishing allows for a very accurate planarization of the surface. This is important for photolithography, where the entire wafer surface needs to be within the depth of field of the optical imaging system.

Oxidation

converts silicon to silicon dioxide on top of the surface using oxygen (dry oxidation) or water (wet oxidation). Silicon layers are used as insulators, as masks, or as scattering layers for ion implantation. To grow silicon dioxide layers on top of non-silicon layers tetraethyl orthosilicate (TEOS) deposition or silane pyrolysis are used instead.

Ion implantation

is the common technique to introduce dopants into the semiconductor. High energy ions are able to penetrate into the target. The penetration depth can be controlled by the ion energy and the incidence angle. Subsequent annealing allows for the redistribution of dopants and repairs lattice defects caused by ion bombardment.

Diffusion

of dopants from the wafer surface into the semiconductor is another technique for doping. The dopants can be supplied from a gas or liquid phase, or from a pre-deposited layer. Diffusion within the semiconductor is mainly controlled by temperature and is often a parasitic effect of subsequent processing steps which operate at higher temperatures.

Focused particle beams

are generated by accelerating ions or electrons towards the wafer surface and focusing them using an electromagnetic imaging system similar to that of electron microscopes [133]. Beam diameters down to $\SI{10}{\nano\metre}$ are possible and can be used for structuring either by local removal or deposition of material. The small throughput of particle beam processes is not feasible for series production of ICs. However, they are useful for sample sectioning, mask repair, or MEMS fabrication [99,132].