nMOS | ... | n-type MOS |
pMOS | ... | p-type MOS |
BTE | ... | BOLTZMANN's transport equation |
CMOS | ... | Complementary MOS |
CNT | ... | Carbon nanotube |
CSB | ... | Central shutter barrier |
CV | ... | Capacitance-voltage |
DIBL | ... | Drain-induced barrier lowering |
DRAM | ... | Dynamical RAM |
ECB | ... | Electrons from the conduction band |
EED | ... | Electron energy distribution |
EEPROM | ... | Electrically erasable programmable read-only memory |
EOT | ... | Effective oxide thickness |
EVB | ... | Electrons from the valence band |
FET | ... | Field-effect transistor |
FN | ... | FOWLER-NORDHEIM |
FWHM | ... | Full-width half-maximum |
HED | ... | Hole energy distribution |
HVB | ... | Holes from the valence band |
ITRS | ... | International Technology Roadmap for Semiconductors |
IV | ... | Current-voltage |
LDD | ... | Lightly doped drain |
MOCVD | ... | Metal-organic chemical vapor deposition |
MOS | ... | Metal-oxide-semiconductor |
MPU | ... | Microprocessor unit |
MOSFET | ... | MOS field-effect transistor |
NEGF | ... | Non-equilibrium GREEN's function |
NTRS | ... | National Technology Roadmap for Semiconductors |
NVM | ... | Non-volatile memory |
PIF | ... | PROFILE INTERCHANGE FORMAT |
PLEDM | ... | Planar localized-electron device memory |
PLEDTR | ... | Planar localized-electron device transistor |
QTBM | ... | Quantum transmitting boundary method |
QBS | ... | Quasi-bound state |
RAM | ... | Random-access memory |
RTA | ... | Relaxation-time approximation |
SIA | ... | Semiconductor Industry Association |
SILC | ... | Stress-induced leakage current |
SIMS | ... | Secondary ion mass spectroscopy |
SOI | ... | Silicon on insulator |
SONOS | ... | Silicon-oxide-nitride-oxide-silicon |
SRAM | ... | Static random-access memory |
STI | ... | Shallow trench isolation |
TAT | ... | Trap-assisted tunneling |
TCAD | ... | Technology computer-aided design |
TEM | ... | Transmission electron microscopy |
TM | ... | Transfer matrix |
WKB | ... | WENTZEL-KRAMERS-BRILLOUIN |
WSS | ... | WAFER-STATE SERVER |
A. Gehring: Simulation of Tunneling in Semiconductor Devices