The simulation of manufacturing processes and the electromagnetic activities in today's semiconductor devices is one of the most demanding subjects in applied mathematics and electronics and of substantial importance in industry. These simulations and hence those of the electrical behavior of the devices enable semiconductor manufacturers to determine the properties of future devices prior to the beginning of the production cycle. Highly expensive test runs can be eliminated by deepening the understanding of the physical processes occurring during the fabrication and the operation of the devices. Using this knowledge devices can be optimized in an early phase and the manufacturing processes can be improved with respect to the quality of the resulting devices and manufacturing throughput.
This work can be divided into two parts. The first part is focused on the question how to determine parameters of models. Nearly all models for the simulation of semiconductor processes and devices depend on certain parameters that must be determined precisely in order to ensure predictive simulations. Hence an inverse modeling framework for solving real world problems was developed. Furthermore the approximations suggested provide several advantages compared to the conventional response surface method.
The second part is dedicated to applications of inverse modeling and process simulation. The deposition of layers into silicon trenches and the etching of trenches into silicon are crucial manufacturing steps for state of the art memory cells and other semiconductor devices like power MOSFET s. Simulating and understanding the evolution of the wafer surface enables to predict the resulting profiles and thus to optimize the process conditions and the performance of the final devices.
For topography simulations an accurate description of moving boundaries is crucial in addition to proper treatment of the chemical and physical processes. The level set method provides a new and interesting alternative to established methods for tracking boundaries. Thus an improved level set algorithm was developed which serves as the basis of a general simulator for deposition and etching processes. It consists of four modules, namely a level set module, a surface reaction module, and modules for particle transport by radiosity or diffusion. It can be used for simulating all common deposition and etching processes.
All applications were requested or inspired by industrial partners. The topic of the cooperations with Cypress Semiconductor (San Jose, CA, USA), Infineon Technologies (Villach, Austria), and the Toshiba R&D Center (Kawasaki, Japan) was topography simulation. The cooperations with the Sony Atsugi Technology Center (Hon-Atsugi, Tokyo, Japan) and austriamicrosystems (Unterpremstätten, Austria) were focused on inverse modeling problems.
Clemens Heitzinger 2003-05-08