As modern integrated circuit technologies favor shallow junctions, diffusion of dopants must be kept to a minimum. Thus, it occurs mostly as a parasitic process during thermal oxidation and ion implantation annealing (as already mentioned in the previous section). Nevertheless, it still finds application in the wells' formation in CMOS technologies. Here, dopants from a chemical vapor source or a predeposited doped layer are introduced into the wafer. Since the reconstruction of the chrystaline structure after ion implantation is never perfect, methods based on the diffusion from a doped material layer for damage-free shallow junction formation are under research.