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3.3.1 Generation of Layout sets

There must be some interface with the designer, so that it can control the generation process. This is accomplished by specifying the rules from which the sets are created. In our approach the generation of parameterized layout sets can be divided in four steps:

Specification of the result.

The first step is to draw (or import) a template layout. This is an ordinary layout where the features to be changed must have unique names. Then, the initial value, final value and increment of one or two variables (one for each axis) must be given. They will determine the number of different layouts generated and control the variation size of each step.

The third step specifies the constraints. They are used two folded: to generate premature exit conditions or warning messages using the keywords exit and warning respectively, or in order to force some relations between masks through the keyword force (which will have maximum priority). To understand the importance of constraints one should note, that changes in the mask dimensions can cause wafer geometries that are completely topologically dissimilar. As presented in Figure 3.6, the increase in the width of the two interconnect lines can originate a short. Here the constraint is that the distance between them must be larger than the minimum pitch allowed by the lithographic system that is available.

Checking the distance of two layers is available with the function minDistance that accepts as input, two layer names and a float number (the allowed minimum distance). The test conditions fullInside, fullOutside (each one accepts two layer names as input variables) check if a layer is totally inside or totally outside another one.

Figure 3.6: Without constraints mask modification may originate wrong topologies.
\begin{figure}
\centerline{\epsfig{file=LAYcontraints.eps,width=0.8\linewidth}}
\end{figure}

In the last step, the rules to build the output layouts are given. The layers are formed as the result of operations with masks of the template layout. The operations are the usual boolean operations (AND, OR and NEGATION) and a set of operators that can depend on the values of the step variables (so they may change at each iteration).

The last three steps are specified in an auxiliary ASCII file, whose syntax looks like the one in Figure 3.8. This file corresponds to the example presented in Section 3.3.2. The syntax used for boolean operations is the same as standard C [28]. The dollar character before a layer name marks a variable as internal, which will not be written to the output layouts. The evaluate-functions perform various operations in $\Re^2$. A list of the available functions is presented in Table 3.1.


next up previous
Next: 3.3.2 Layout Set Example Up: 3.3 Parameterized Layouts Previous: 3.3 Parameterized Layouts
Rui Martins
1999-02-24