List of Publications

[18]

R. L. de Orio, H. Ceric, and S. Selberherr,
``Physically Based Models of Electromigration: From Black's Equation to Modern TCAD Models'',
Microelectron. Reliab., 2010 (in press).

[17]

H. Ceric, R. L. de Orio, J. Cervenka, and S. Selberherr,
``A Comprehensive TCAD Approach for Assessing Electromigration Reliability of Modern Interconnects'',
IEEE Trans. Mat. Dev. Rel., vol. 9, no. 1, pp. 9-19, 2009.

[16]

R. L. de Orio, H. Ceric, J. Cervenka, and S. Selberherr,
``Analysis of Electromigration in Dual-Damascene Interconnect Structures'',
J. Integrated Circuits and Systems, vol. 4, no. 2, pp. 67-72, 2009.

[15]

R. L. de Orio, H. Ceric, and S. Selberherr,
``Effect of Strains on Anisotropic Material Transport in Copper Interconnect Structures under Electromigration Stress'',
J. Comput. Electron., vol. 7, no. 3, pp. 128-131, 2008.

Oral and Poster Presentations with Proceedings:

[14]

R. L. de Orio, H. Ceric, J. Cervenka, and S. Selberherr,
``Electromigration Failure Development in Modern Dual-Damascene Interconnects'',
Proc. Intl. Conf. on Very Large Scale Integration, vol. 15, 5 pages, 2009.

[13]

R. L. de Orio, H. Ceric, J. Cervenka, and S. Selberherr,
``The effect of Copper Grain Size Statistics on the Electromigration Lifetime Distribution'',
Proc. Intl. Conf. on Simulation of Semiconductor Processes and Devices, pp. 182-185, 2009.

[12]

H. Ceric, R. L. de Orio, J. Cervenka, and S. Selberherr,
``Copper Microstructure Impact on Evolution of Electromigration Induced Voids'',
Proc. Intl. Conf. on Simulation of Semiconductor Processes and Devices, pp. 178-181, 2009.

[11]

R. L. de Orio, H. Ceric, J. Cervenka, and S. Selberherr,
``The Effect of Microstructure on Electromigration-Induced Failure Development'',
Proc. Intl. Symp. on Microelectronics Technology and Devices, pp. 345-352, 2009.

[10]

R. L. de Orio, H. Ceric, J. Cervenka, and S. Selberherr,
``The Effect of Microstructure on the Electromigration Lifetime Distribution'',
Proc. Intl. Symp. on the Physical and Failure Analysis of Integrated Circuits, pp. 731-734, 2009.

[9]

H. Ceric, R. L. de Orio, J. Cervenka, and S. Selberherr,
``The Effect of Microstructure on Electromigration Induced Voids'',
Proc. Intl. Symp. on the Physical and Failure Analysis of Integrated Circuits, pp. 694-697, 2009.

[8]

H. Ceric, R. L. de Orio, J. Cervenka, and S. Selberherr,
``Stress-Induced Anisotropy of Electromigration in Copper Interconnects'',
Proc. of the Stress Induced Phenomena in Metallization: 10th International Workshop, pp. 56-62, 2008.

[7]

H. Ceric, R. L. de Orio, J. Cervenka, and S. Selberherr,
``Analysis of Microstructure Impact on Electromigration'',
Proc. Intl. Conf. on Simulation of Semiconductor Processes and Devices, pp. 241-244, 2008.

[6]

R. L. de Orio, H. Ceric, S. Carniello, and S. Selberherr,
``Analysis of Electromigration in Redundant Vias'',
Proc. Intl. Conf. on Simulation of Semiconductor Processes and Devices, pp. 237-240, 2008.

[5]

R. L. de Orio, S. Carniello, H. Ceric, and S. Selberherr,
``Analysis of Electromigration in Dual-Damascene Interconnect Structures'',
Proc. Intl. Symp. on Microelectronics Technology and Devices, pp. 337-348, 2008.

[4]

H. Ceric, R. L. de Orio, J. Cervenka, and S. Selberherr,
``TCAD Solutions for Submicron Copper Interconnect'',
Proc. Intl. Symp. on the Physical and Failure Analysis of Integrated Circuits, pp. 78-81, 2008.

[3]

H. Ceric, R. L. de Orio, and S. Selberherr,
``Comprehensive Modeling of Electromigration Induced Interconnect Degradation Mechanisms'',
Proc. Intl. Conf. on Microelectronics, pp. 69-76, 2008.

[2]

R. L. de Orio, H. Ceric, and S. Selberherr,
``Strain-Induced Anisotropy of Electromigration in Copper Interconnect'',
Proc. Intl. Semiconductor Device Research Symp., TA4-01, pp. 1-2, 2007.

[1]

R. L. de Orio, H. Ceric, and S. Selberherr,
``Effect of Strains on Anisotropic Material Transport in Copper Interconnect Structures under Electromigration Stress'',
Proc. Intl. Workshop on Computational Electronics, pp. 62-63, 2007.