3.3.1 Standard Power MOSFETs

One of the major drawbacks of power MOSFETs compared to bipolar devices is their high on-state conduction loss for high-voltage applications. Generally, power MOSFETs have a double-diffused structure with a lightly doped drift region to support the high voltage. Figure 3.12 shows a standard power DMOSFET. The on-resistance of the structure shown in the figure is the total resistance between the source and drain terminal in the on-state. This can be determined by the resistance components of the device. The major resistance components for high-voltage DMOSFETs are the channel ( $R_\mathrm{CH}$), accumulation ( $R_\mathrm{A}$) and drift layer ( $R_\mathrm{D}$) resistances, and $R_\mathrm{J}$ which is the contribution from the drift region between the $p$-base regions (JFET region). The resistances of the $n^+$-emitter and substrate regions are generally negligible for high-voltage power MOSFETs. For high-voltage devices the drift region contributes a large resistance. It is important to decrease the drift doping concentration to obtain a high blocking voltage. Increasing the BV can result in a significant undesired increase of $R_\mathrm{sp}$.

Consider the ideal case where the $R_\mathrm{sp}$ of power MOSFETs is determined by the drift region only, and assume that the current flows uniformly through the drift region without current spreading effects. Then the relation between the on-resistance and the BV can be expressed as

$$R_\mathrm{sp} = 5.93 \times 10^{-9} \mathrm{BV}^{2.5}\,\,[\Omega\,cm^{2}],$$ (3.39)

for $n$-channel devices and

$$R_\mathrm{sp} = 1.63 \times 10^{-8} \mathrm{BV}^{2.5}\,\,[\Omega\,cm^{2}],$$ (3.40)

for $p$-channel devices. The resistances of the accumulation and JFET region are not considered in the equations. The mobility of the drift region also affects the on-resistance of the devices.

Figure 3.12: Schematic layout of a standard DMOSFET.

In deriving the numerical values in these equations, it is assumed that the mobility is that for a relatively low doping concentration ( $1.0 \times 10^{16} \mathrm{cm}^{-3}$). The ideal $R_\mathrm{sp}$ of a $p$-channel MOSFET is higher than that for the $n$-channel MOSFET due to the lower mobility of holes than electrons in silicon.

In low-voltage MOSFETs below 100V, the channel resistance and the charge accumulation layer resistance are the dominant factors in the total on-resistance of MOSFETs. These resistances account more than 80% of the total resistance in 20V class devices. On the other hand, in the medium- and high-voltage MOSFETs, the resistance is dominated by doping concentration and thickness of the drift region.

Figure 3.13: $R_\textrm {sp}$ versus BV of planar, trench power MOSFETs, and the theoretical Si limit.

Figure 3.13 shows the state-of-the-art trade-off between $R_\mathrm{sp}$ and BV of standard power MOSFETs and theoretical silicon limit, respectively [133]. The superior switching performance of the power MOSFET ensure that it has become a key device in the field of SMPS. However, as can be seen in the figure, the on-resistance of power MOSFETs increases sharply with the BV. This has prevented the use of power MOSFETs at high voltages. A high blocking voltage of a standard power MOSFET requires a thick and low doped epitaxial layer ($n$-drift region) which causes an increase in the on-resistance. A variety of MOS structures can be used for power MOSFETs. In the medium- and high-voltage applications, reliability and SOA (safe operating area) of the device are more important than the on-resistance. Therefore, planar structure is frequently used in the high-voltage power MOSFETs, and the trench structure is used in the low-voltage MOSFETs (see Figure 3.13).