Abstract

Significant progress has been achieved in the fabrication of integrated circuits during the last years. Technology CAD (TCAD) is increasingly contributing to these achievements. TCAD simulation tools have been developed to sophisticated levels, and they created a demand for simulation environments. These simulation environments accomplish the efficient usage of the simulation tools. This work introduces the simulation environment SIESTA (Simulation Environment for Semiconductor Technology Analysis) which has been developed for this purpose.

SIESTA is an open simulation environment which means it can work with virtually arbitrary simulation tools. The interface which integrates these simulation tools has been designed very rigorously, and it takes care that SIESTA is able to control the simulation tools, and to manage their results.

Furthermore, SIESTA offers its users abstraction mechanisms which allow to design abstract simulation models, and to define relations between different models. This functionality allows for the formulation of complicated matters on an abstract simulator independent level. In practice networks of models can be used to describe problems such as they arise in the modeling of integrated circuits' fabrication technologies. It is possible to design models including several device categories of an integrated circuit (which are implicitly coupled by their common fabrication process), and, therefore, include several aspects. As a consequence optimization can be performed based on a simulation model which includes multiple integrated devices instead of just a single one.

Based on these abstractions it is possible to carry out optimizations. These optimizations improve the simulation model in terms of a certain respect. In order to cope with the considerable simulation effort which is required for that sort of task, within minimal time, SIESTA offers features for distributed parallel computation. Thereby, the simulation work is distributed to computers on a local area network in such a way that the overall computation time becomes minimal.

The features of the simulation environment are demonstrated by two examples. The first example illustrates how SIESTA's modeling features can be used to integrate process and device simulation tools in order to optimize the substrate currents of MOS devices. The second example explores SIESTA's calibration capabilities in order to establish a system for the inverse modeling of doping profiles based on electrical measurements. The inverse modeling includes measurements of several similar devices which helps to improve the confidence of this method.