The most promising way to tackle these problems is the so-called Ultra-Low-Power (ULP) CMOS technology which employs low supply voltages to reduce the power consumption and low threshold voltages to maintain the performance. Early work in this field investigated the lower bound of CMOS supply voltage based on the analysis of inverters and found a value of about 200mV at room temperature [76]. Other pioneering work is [40] in which the tradeoff between speed and power efficiency is investigated with circuit simulation methods, and [9] which describes experiments with a standard CMOS process with the threshold adjust implants omitted to obtain transistors with low threshold voltages. This work investigates ULP CMOS technology by means of Technology Computer Aided Design, i.e., numerical process and device simulation, over a wider range of technology and operating parameters to provide preliminary data for further experimental work. In addition to digital circuits, analog and mixed analog digital circuits were investigated in order to find out whether they can be realized in a dedicated ULP technology.