ADB | Asymmetrically Doped Buried-layer |
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ASCII | American Standard Code for Information Interchange |
CMOS | Complementary MOS |
DIBL | Drain-Induced Barrier Lowering |
DMOS | Double-diffused MOS |
DOE | Design Of Experiment |
FIB | Focused Ion Beam |
GC | Graded Channel |
GCMOS | Graded Channel MOS |
HCE | Hot-Carrier Effects |
II | Impact Ionization |
LAC | Lateral Asymmetric Channel |
LATI | Large Angle Tilted Implantation |
LDC | Laterally Doped Channel |
LDD | Lightly Doped Drain |
MOS | Metal Oxide Semiconductor |
NMOS | N-channel MOS |
PCD | Peaking Channel Doping |
PIF | Profile Interchange Format |
PMOS | P-channel MOS |
QFL | Quasi-Fermi Level |
RCP | Retrograde Channel Profile |
RSM | Response Surface Model |
SCE | Short-Channel Effect |
SIA | Semiconductor Industry Association |
SIESTA | Simulation Environment for Semiconductor Technology Analysis |
SOI | Semiconductor On Insulator |
TCAD | Technology Computer Aided Design |
ULSI | Ultra Large Scale Integration |