Dissertation — Summary and Outlook

7 Summary and Outlook

Numerical methods for the 3D simulation of selective epitaxy and anisotropic wet etching were presented in the context of process TCAD. The materials which are patterned with these processes are of crystalline nature, which results in inherently anisotropic processes. The resulting formation of crystal facets gives rise to complex 3D semiconductor topographies and needs to be captured by simulation tools to support semiconductor device fabrication. Modeling approaches ranging from atomistic to continuum were reviewed and the excellent capabilities of topography-focused continuum models based on the level-set method were identified.

Inherently anisotropic processes described with the level-set method pose several challenges regarding the computational treatment. First, the emerging crystal facets need to be resolved with high spatial accuracy (no artificial rounding). Second, the sharp edges of facets can cause abrupt changes in the level-set function. Since the level-set equation (which determines the surface evolution) is a hyperbolic partial differential equation, abrupt numerical changes of the level-set function lead to the excitation of artificial numerical waves. This leads to instable surface propagation and thus must be avoided. Third, the conventional description of multiple materials with a stack of level-set functions introduces numerical inaccuracies which can result in incorrectly imposed local surface convexity. Due to the sensitivity of inherently anisotropic process to the local topography, robust growth or etch simulations are not ensured.

In this thesis, a stable and robust level-set method which overcomes theses challenges was presented. Originating from the viscosity solution of the level-set equation and monotonicity considerations, a finite difference Stencil Lax-Friedrichs scheme was derived. In particular, the scheme provides optimized front propagation for crystal orientation-dependent etch and growth models, which is achieved by determining the appropriate numerical dissipation coefficients and size of the discrete time step. Most importantly, no heuristic numerical parameters are required, facilitating the practical use. Furthermore, the deposition top-layer method for selective epitaxial growth in multi-material structures was proposed, which is based on Boolean operations on a stack of level-sets. The capabilities of these techniques were assessed in typical epitaxy and etching configurations, demonstrating that the Stencil Lax-Friedrichs scheme and deposition top-layer method enable reliable 3D topography simulations with crystal orientation-dependent growth or etch rate models.

These numerical methods were applied for the simulation of epitaxy and anisotropic wet etching steps in a variety of state-of-the-art semiconductor fabrication processes. The applications involve several materials ( $\silicon$ , SiGe, 3C-SiC, and sapphire) and processes including source-drain engineering of MOSFETs, SiGe fins, and anisotropic wet etching of sapphire substrates.

In order to account for the different crystal symmetry exhibited by these materials, a growth and etch interpolation procedure which respects the underlying crystal symmetry operations was introduced. In particular, the ideas of the traditional Hubbard interpolation which is only applicable for octahedral symmetry (as exhibited by $\silicon$ and SiGe) were generalized to allow for interpolation of growth and etch rates in tetrahedral and trigonal symmetry. Thus, simulations of crystal orientation-dependent processing of the tetrahedral 3C-SiC and the trigonal sapphire were enabled.

Furthermore, the intricate wet etching anisotropy of sapphire was modeled with a parametrization that is well-suited to reflect the multiple minima and maxima of sapphire’s etch rate distribution. Hence, a comprehensive sapphire wet etching model for different etchants and etch temperatures was proposed. All simulation results were compared with experimental observations (i.e., SEM, TEM, and AFM data) from the literature, showing accurate congruence. Thus, the capability of level-set based continuum modeling approach was demonstrated.

The merits of the continuum modeling were further utilized by combining process and device TCAD. To set the stage, the impact of the process parameters annealing time and temperature of the post-implantation annealing of 4H-SiC DMOSFETs on the device characteristics was highlighted. The annealing conditions cause significant threshold voltage shifts. These were quantified and the range of desirable annealing parameters was identified.

A similar investigation was performed for the highly complex topographies of wet etched sapphire substrates which are essential for GaN-based LEDs. The continuum level-set model for anisotropic wet etching of sapphire was employed to virtually fabricate LED structures which were subsequently characterized with ray-tracing calculations to determine the light extraction efficiency. The simulations have shown that optimization of etch time and temperature result in an up to 15% increase in efficiency of wet etched PSSs compared with conical substrate patterns.

Even though the capabilities of the proposed Stencil Lax-Friedrichs scheme and the deposition top-layer method were demonstrated in this thesis, future work should address the performance and optimizations for calculations on adaptive (i.e., locally refined) computational grids. Furthermore, an extension of the presented Stencil Lax-Friedrichs scheme to flux-dependent processes would be of interest. For instance, the incorporation of ray-tracing-based flux calculations is important for the heteroepitaxy of 3C-SiC on $\silicon$ pillars, because ray-tracing allows to account for particle transport and shading effects in a general way.

As far as modeling of epitaxy and etching processes is concerned, further investigations might consider more growth conditions and etchant mixtures. For instance, in the case of anisotropic wet etching, the impact of alcohol supplements is known to significantly alter the etch anisotropy. Likewise, reactor parameters (e.g., precursor flow) influence epitaxial growth rates. By considering effects of that kind, comprehensive growth and etch rate models can be developed.

Furthermore, the combination of process simulation and light extraction efficiency ray-tracing can be further pursued by considering different initial geometries (e.g., hemispherical or cylindrical patterned sapphire substrates). The impact of various etchants can also be investigated for alternative LED designs like flip-chip LEDs.

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Own Publications

Journal Articles

Conference Contributions

Invited Talks

Curriculum Vitae

Personal Information

Name	Alexander Toifl
Nationality	Austrian
Place of Birth	St. Pölten, Austria

Education

since 08/2018	Doctoral Student
	Institute for Microelectronics, TU Wien, Austria
	Primary Supervisor: Assistant Prof. Privatdoz. Dipl.-Ing.
	Josef Weinbub, BSc
	Secondary Supervisor: O.Univ.Prof. Dipl.-Ing. Dr.techn. Dr.h.c. Siegfried Selberherr
09/2016 - 06/2018	Master’s Degree in Microelectronics and Photonics
	(With Distinction)
	Faculty of Electrical Engineering and Information Technology,
	TU Wien, Austria
	Thesis: Modeling and Simulation of Thermal Annealing of Implanted GaN and SiC
03/2013 - 06/2016	Bachelor’s Degree in Electrical Engineering and
	Information Technology (With Distinction)
	Faculty of Electrical Engineering and Information Technology,
	TU Wien, Austria
	Thesis: Interaction of Random Discrete Dopants with Oxide Traps

Employment

since 08/2018	Research Assistant
	Christian Doppler Laboratory for HPTCAD
	Institute for Microelectronics, TU Wien, Austria
07/2016 - 09/2016	Freelance Software Engineer (ViennaMesh, Mesh Coarsening)
	Institute for Microelectronics, TU Wien, Austria
2015-2016	Tutor (Lecture Signals and Systems 2)
	Institute of Telecommunications, TU Wien, Austria
08/2011	Internship
	Institute of IT Security Research, FH St. Pölten, Austria

Awards

09/2018	Faculty’s Award for the Presentation of the Master’s Thesis
	(Preis der Fakultät für Elektrotechnik und Informationstechnik)
2014-2017	Four Annual Merit Scholarships (Leistungsstipendien)
	Faculty of Electrical Engineering and Information Technology,
	TU Wien, Austria

$[1]$	A. Toifl, F. Rodrigues, L. F. Aguinsky, A. Hössinger, and J. Weinbub. “Continuum Level-Set Model for Anisotropic Wet Etching of Patterned Sapphire Substrates”. Semiconductor Science and Technology 36 (4) (2021), p. 045016. doi: 10.1088/1361-6641/abe49b
$[2]$	A. Toifl, M. Quell, X. Klemenschits, P. Manstetten, A. Hössinger, S. Selberherr, and J. Weinbub. “The Level-Set Method for Multi-Material Wet Etching and Non-Planar Selective Epitaxy”. IEEE Access 8 (2020), pp. 115406–115422. doi: 10.1109/ACCESS.2020.3004136
$[3]$	A. Toifl, V. Šimonka, A. Hössinger, S. Selberherr, T. Grasser, and J. Weinbub. “Simulation of the Effects of Postimplantation Annealing on Silicon Carbide DMOSFET Characteristics”. IEEE Transactions on Electron Devices 66 (7) (2019), pp. 3060–3065. doi: 10.1109/TED.2019.2916929
$[4]$	V. Šimonka, A. Toifl, A. Hössinger, S. Selberherr, and J. Weinbub. “Transient Model for Electrical Activation of Aluminium and Phosphorus-Implanted Silicon Carbide”. Journal of Applied Physics 123 (23) (2018), p. 235701. doi: 10.1063/1.5031185

$[5]$	F. Rodrigues, L. F. Aguinsky, A. Toifl, A. Hössinger, and J. Weinbub. “Feature Scale Modeling of Fluorocarbon Plasma Etching for Via Structures Including Faceting Phenomena”. Book of Abstracts of the International Workshop on Computational Nanotechnology (IWCN). 2021, pp. 101–102
$[6]$	M. Quell, A. Toifl, A. Hössinger, S. Selberherr, and J. Weinbub. “Parallelized Level-Set Velocity Extension Algorithm for Nanopatterning Applications”. Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). 2019, pp. 335–338. doi: 10.1109/SISPAD.2019.8870482
$[7]$	A. Toifl, M. Quell, A. Hössinger, A. Babayan, S. Selberherr, and J. Weinbub. “Novel Numerical Dissipation Scheme for Level-Set Based Anisotropic Etching Simulations”. Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). 2019, pp. 327–330. doi: 10.1109/SISPAD.2019.8870443
$[8]$	P. Manstetten, G. Diamantopoulos, L. Gnam, L. F. Aguinsky, M. Quell, A. Toifl, A. Scharinger, A. Hössinger, M. Ballicchia, M. Nedjalkov, and J. Weinbub. “High Performance TCAD: From Simulating Fabrication Processes to Wigner Quantum Transport”. Book of Abstracts of the Workshop on High Performance TCAD (WHPTCAD). 2019, p. 13
$[9]$	G. Diamantopoulos, P. Manstetten, L. Gnam, V. Šimonka, L. F. Aguinsky, M. Quell, A. Toifl, A. Hössinger, and J. Weinbub. “Recent Advances in High Performance Process TCAD”. Book of Abstracts of the SIAM Conference on Computational Science and Engineering (CSE). 2019, p. 335
$[10]$	A. Toifl, V. Šimonka, A. Hössinger, S. Selberherr, and J. Weinbub. “Steady-State Empirical Model for Electrical Activation of Silicon-Implanted Gallium Nitride”. Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). 2018, pp. 336–339. doi: 10.1109/SISPAD.2018.8551728