Next: 5.2.5 Manufacturability
Up: 5.2 Single Electron Memories
Previous: 5.2.3 Random Background Charge
Because of the minuteness of capacitances and the low number of electrons
involved in charging and discharging, the power consumption of SET memories
is orders of magnitudes smaller than that of conventional memories. However,
high integration densities and high switching speed may lead to unacceptable
power dissipation of
kW/cm2 [78]. Especially
a design which merely replaces FETs with SET transistors has a high power
consumption since a constant static current is flowing. The energy dissipation
of a single tunneled electron is of the order of the Coulomb energy, e2/2C. With
a tunnel rate of
the power dissipation of one SET transistor
becomes
,
which is for characteristic parameters about
0.1 W. Therefore integration densities of
1010/cm2 and more demand heat removal rates of
kilowatts per square centimeter. Much better in this respect is SET logic,
where a small
number of electrons represent a logic state. No static current is flowing.
Here again, one transferred electron dissipates roughly the Coulomb energy, e2/2C,
but this time the switching rate of gates is much lower than the intrinsic
tunnel rate. With a switching time of 1 ns, the power consumption of one
logic gate is about 10-10 W. Assuming the same integration
density as before results in an acceptable power dissipation of
1 W/cm2 (see also D. Averin and K. Likharev [9]).
Next: 5.2.5 Manufacturability
Up: 5.2 Single Electron Memories
Previous: 5.2.3 Random Background Charge
Christoph Wasshuber