Hajdin Ceric Associate Prof. Dipl.-Ing. Dr.techn. Publications

One of the most crucial problems for the microelectronics industry today is the fact that, unlike transistors, interconnect performance does not improve with miniaturization. Moreover, the reduced scale of the interconnect introduces new reliability issues. For interconnects with a half-pitch of several tenths of nanometers, new solutions need to be found.
Interconnect performance when scaling is mainly limited by a phenomenon known as electromigration. Electromigration is a degradation process that is, on a quantum-mechanical level, closely related to the phenomena that give rise to metallic resistance. The momentum transfer from current-carrying electrons to the lattice atoms causes material transport along the interconnect line and induces mechanical stress.
Accordingly, there are two ways to improve interconnect performance and electromigration reliability. The first one is the modification of copper technology and the second is the introduction of metals other than copper with corresponding new technologies. The modification of copper technology includes the application of new or modified deposition processes and new materials for capping and barrier layers.
In addition, new intermetal dielectrics have been considered. Through numerous experiments and related studies, we have a clearer picture of how these modifications actually influence electromigration reliability. Generally, new materials attached to copper produce new types of interfaces that reduce electromigration-induced material transport. Deposition processes also influence the structure of these interfaces and, additionally, the copper microstructure. In this year's project, we applied multilevel modeling (refer to Fig. 1) and simulation approaches to determine the main electromigration-related reliability issues for aggressively downscaled interconnects in the range of 10 nm and below for use in present and future technologies. At the top level, the moderate portions of the interconnect layout, including metallization, interface layers and dielectrics, were studied by the application of continuum models.
Models that also describe the grain boundaries and interfaces were applied. At the more precise, atomistic level, molecular dynamics and density functional theory methods were applied to determine the crucial parameters for characterization of material transport along grain boundaries and interfaces, specifically diffusivity coefficients and effective valences. These parameters were subsequently used for the parametrization of the top-level continuum models.
The theoretical part of the project focused on the investigation of electromigration in the grain boundaries and at interfaces. The goal was the development and application of numerically efficient and predictive calculations of effective valences. The effective valence strongly depends on the local atomistic configuration, and it is always calculated along some characteristic atomic migration path (see Fig. 2).
To achieve a satisfactory level of understanding of electromigration-induced interconnect degradation, theoretical work with modeling/simulation and experimental studies are jointly required. Such an understanding can act as a solid base for designing more reliable interconnects.

Fig. 1: The multilevel approach for electromigration modeling. Continuum-level models predict interconnect resistance change and failure time. Atomistic-level models provide parametrization of continuum models.

Fig. 2: The jumping path of a copper atom between positions B and A.