7.7  Calibration

7.7.1  Experiment

In the course of this thesis our model was calibrated using HCD measurements provided by imec on 65nm gate length and 150nm gate length n-channel MOSFETs with an EOT of 2.5nm  [163]. The SiON gate oxide has been fabricated using a decoupled plasma nitridation followed by a post-nitridation anneal. For simulation we employed a device structure generated by the Sentaurus process simulator and subsequent calibration using MinimosNT and ViennaSHE. The 65nm nMOSFET was stressed at Vg = Vd = 1.8V and Vg = Vd = 2.2V, while the 125nm counterpart was subjected to HCD at Vg = 0.9V,Vd = 1.8V and Vg = 1.1V,Vd = 2.2V. These combinations of voltages correspond to worst-case conditions typical for short-channel (65nm) and relatively long-channel (150nm) MOSFETs, respectively. In both cases the ambient temperature was 298K. To assess degradation, the linear drain current Id in inversion under low field conditions, i.e. small channel electric field, was measured.

7.7.2  Results

In Figure 7.9 the fit of the model to the measurement data for the 65nm nMOSFET are plotted disregarding various important ingredients of the model.

Figure 7.9:

Left: The relative ΔId,lin degradation for the 65nm n-channel MOSFET stressed under worst case conditions (lines) compared to the measurement data (diamonds). The influence of the various ingredients of the model is shown. The degradation predicted by the model is strongly influenced by electron-electron scattering and single hot carriers (anti-bonding processes). Right: Acceleration integrals along the channel (from source to drain at the interface) with and without considering electron-electron scattering and impact ionization.

If any of the mechanisms, such as MVE or EES, are neglected the measurement data cannot be reproduced by the model. This is also reflected in the corresponding Nit profiles (cf. Figure 7.10). From the acceleration integrals for the ground state (cf. Figure 7.9) it can be seen that impact ionization has a negligible effect on the HCD for this particular device. However, the influence of electron-electron scattering is massive, as expected for a short channel device. The effect of EES is naturally reflected also in the Nit profiles, where it causes an increase of Nit in the center of the channel right under the gate (cf. Figure 7.10). Interesting features are also the impact of the interaction between the electric field and the dipole moment as well as the contributions of the single hot carriers (anti-bonding process) into HCD. Contrary to previous speculations  [46], the increase of Nit shifted towards the source as compared to the ‘classical’ Nit maximum near the drain, for the devices considered here, cannot be explained by a prominent majority carrier (hole) contribution. Instead, the electric field-dipole interaction and the activation energy dispersion seem to be responsible for this tendency. The later is highly important for a physics based description of HCD and Figure 7.10 clearly shows the consequence of neglecting the activation energy dispersion. Ignoring multi-vibrational excitation or activation energy dispersion does not drastically change the Nit profiles, but causes a uniform shift of ΔId towards lower values (cf. Figure 7.9).

Figure 7.10:

Nit profiles predicted by the model for the 65nm n-channel MOSFET stressed under worst case conditions. The source side is located at negative x. Noteworthy is the strong influence of the dipole moment and the activation energy dispersion, which strongly affect Nit close to the source side, but shows a smaller influence on the drain current degradation as compared to electron-electron scattering. The arrow indicates the growing Nit with increasing stress time.

The same line of reasoning applies to the 150nm nMOSFET, for which experimental data is properly represented by the simulation resuls. Thus, our model is capable of predicting the ΔI_dlin degradation for different devices (with various channel lengths) stressed using various combinations of operating voltages with the same set of model parameters. In Figure 7.11 the fits, using a single parameter set, for all stress conditions and devices are shown. All the ingredients of the model are necessary to represent the data. However, electron-electron scattering is most important for shorter channel devices as can be seen in Figure 7.11 for both stress conditions. A significant contribution from the majority charge carriers is, despite previous developments  [174, 46], not necessary in this particular case to represent the experimental data for the long and short channel device for all stress conditions. This is due to the strong unipolar character of the MOSFETs under investigation, where an insignificant amount of majority carriers in the channel is typical. For the devices investigated here, the hole contribution HCD is negligibly small.

Figure 7.11:

Relative drain current degradation as predicted by our model for both the 65nm and the 150nm (gate length) n-channel device for all stress conditions compared to measurement data (diamonds). Both short and long channel devices show a significant dependence on activation energy dispersion and hot carriers (anti-bonding processes). However, electron-electron scattering mostly affects only the short channel device.

7.7.3  Importance of Electron-Electron Scattering

Figure 7.12:

The influence of electron-electron scattering on the acceleration integral. The distribution functions have been obtained using ViennaSHE and the electron-electron scattering operator therein  [61]. The graphical comparison of the acceleration integrals with and without electron-electron scattering shows the importance of EES for hot-carrier degradation modelling.

Electron-electron scattering is a two particle process by which one particle gains kinetic energy from another particle (cf. Figure 7.13), provided that the kinetic energy of both particles exceeds a certain threshold. Thereby it is, especially in short channels, possible to populate the high energy tails of the distribution function. The elevation of the high energy tail in turn then increases the probability of a single electron to break, upon interaction, a Si-H bond at the semiconductor-oxide interface. This has been exhaustively shown by  [189, 46, 163] that solving the BTE without any electron-electron scattering leads to an underestimation of the hot-carrier degradation. In Figure 7.12 the electron and hole acceleration integrals and the carrier distribution functions are shown, if only phonon (acoustic and optical) and impurity scattering are considered in comparison to the acceleration integrals obtained by additionally considering electron-electron scattering. It has been shown that only the effect of impact ionization can, in certain cases, be safely neglected  [163]. In Figure 7.14 a few selected electron distribution functions at the interface are shown for both devices stressed under worst case conditions. As we demonstrated before, HCD is very sensitive particularly to the high energy tails of the distribution function, and therefore EES is of great importance in the context of hot-carrier degradation modeling.

Figure 7.14:

Selected distribution functions with and without electron-electron scattering at the interface along the channel for the 65nm and the 150nm n-channel device (the source to drain direction is indicated by the arrow). The significance of EES for both channel lengths and all stress conditions is evident. Due to EES the high energy tails of the distribution functions are elevated. Also notable are the phonon-cascades visible at smaller energies.