Being the parameter with the highest uncertainty, the electron and hole mass
in the dielectric is commonly used as a fitting parameter to reproduce
measurements. Its influence on the gate current density is shown in
Fig. 5.7. An increase in the carrier mass by 0.1m leads
to a reduction in the gate current density by about a factor of 10. It must,
of course, be held in mind that with the approaches described in
Section 3, tunneling is described by a single value for the carrier
mass. Its use as a fitting parameter may thus well be justified. Recent
investigations, however, report an increase of the electron mass with reducing
thickness of the dielectric layer, which is backed by measurements and
tight-binding band structure
calculations [252,253,254].
Figure 5.7:
Effect of the carrier mass on electron tunneling current (left)
and hole tunneling current (right) in an nMOS (top) and a pMOS (bottom) with
2 nm dielectric thickness, 1e20 cm-3 polysilicon and 5e18 cm-3 substrate doping.