Fig. 5.13 shows the effect of the substrate doping
concentration on the extension region gate current density. Similar to the
polysilicon gate doping, a higher substrate doping leads to increased majority
and decreased minority tunneling current.
Figure 5.13:
Effect of the substrate doping on
the electron tunneling current (left) and the hole tunneling current (right)
in the source and drain extension region of an nMOS (top) and a pMOS (bottom) with
2 nm dielectric thickness and 5e20 cm-3 polysilicon doping.