B.2 Delay Times

An overview of the different types of delay times which occur in a switching process of a typical logic device is given in Figure B.2.

Figure B.2: Delay times

Here, the output signal is retarded by a certain amount of time $\tau_{\mathrm{D}}$ . After this retardation, the device changes its state and switches. This time is called transition time $\tau_{\mathrm{TR}}$ and is counted from the time where the output signal first reaches $10\%$ of its maximum output signal until the time it reaches $90\%$ of its stationary maximum signal level. The sum of both time periods plus any decaying times due to signal overshoot is called propagation delay $\tau_{\mathrm{PD}}$ .

Other authors (cf. [91]) propose to measure the transition time from the $50\%$ reference voltage level for both the rising and the falling edges.