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Next: 4.1.3 The Real Device Up: 4.1 GaAs versus SiGe Previous: 4.1.1 The Test Device

4.1.2 The Realistic Device

A Si$_{0.8}$Ge$_{0.2}$ HBT with a realistic device structure (see Fig. 4.6, left) from [67] and the Monte Carlo simulation results there was employed for further tuning of MINIMOS-NT models which are used in HD simulations. A comparison, similar to the one presented in [67] was performed. The MC simulation results were compared to DD and HD results obtained with MINIMOS-NT for the electron concentration, the electrostatic potential, the electron velocity, and the electron temperature distribution in the device (see Fig. 4.6). Such comparisons are useful not only to verify the validity of the models for SiGe and the HD transport model, but also to gain an insight why and where the HD model should be used having in mind the higher computational effort.

Figure 4.6: The HBT structure and electron temperature distribution in the device: Simulation results at V$_\mathrm {BE}$ = 0.87 V and V$_\mathrm {CE}$ = 1 V
\resizebox{1.3\halflength}{!}{
\includegraphics[height=12cm]{figs/tib3.eps}
\includegraphics[height=11cm]{figs/t.epsi}}

In [62] the capabilities of MINIMOS-NT were demonstrated by a HD mixed-mode device-circuit simulation of a 5-stage Current-Mode Logic (CML) ring oscillator containing 10 SiGe HBTs (Fig. 4.7). The DD simulation shows a much lower inverter delay time compared to the HD simulation (see Fig. 4.8). This is due to the velocity overshoot in the base-collector space charge region which cannot be modeled using a DD simulation [67]. Furthermore, since the current is higher in the case of HD simulation, the overall speed of the circuit increases. The error of the DD simulation in the inverter delay is in the range of 60% compared to the HD simulation, thus proving the necessity of a HD model.

Figure 4.7: CML ring oscillator circuit
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\psfrag{n1}[][]{ \footnotesize{$\varphi_1$}}
\psf...
...ize{$V_{\mbox{EE}}$}}
\includegraphics[width=\halflength]{figs/circuit_new.eps}}

Figure 4.8: Comparison of DD vs. HD transient response
\resizebox{1.3\halflength}{!}{
\psfrag{2.77556e-17}[c][c]{\footnotesize{\hspace*...
...notesize{time [ps]}}
\includegraphics[width=\halflength]{figs/ro_DD_HD_cmp.eps}}

This example, together with the example presented in the following section, not only confirms the capabilities of MINIMOS-NT to handle complex device structures (such as HBT structures), but also confirms the correct modeling so far of the properties of SiGe in the simulator. The results are quite promising taking into consideration that the emphasis of the work was put on III-V materials and devices.


next up previous contents
Next: 4.1.3 The Real Device Up: 4.1 GaAs versus SiGe Previous: 4.1.1 The Test Device
Vassil Palankovski
2001-02-28