1.3 New Contributions and Overview of Chapters

New lateral power semiconductor structures for smart power applications are suggested and extended with novel device concepts developed over the last decade. Extensive two- and three-dimensional numerical device simulations are performed to study the devices suggested in this dissertation. Best trade-off between $R_\mathrm{sp}$ and BV is observed in these devices compared to that of conventional devices.

This work is divided into five chapters. The first three chapters give an overview of power semiconductors and related analytical studies. Then simulation results of new device structures proposed in this study and conclusions are described in the last two chapters.

Chapter 2 provides the state of the art of power semiconductor devices. It provides a review of the recent developments in vertical and lateral power semiconductor technologies. In this chapter a variety of integration issues from hybrid to monolithic technologies can be seen depending on the power ratings and application fields. A brief overview of device operations and the concept of lateral power devices for smart power applications are also given in this chapter.

Chapter 3 presents the basic semiconductor physics concerning power semiconductors, several of the important physical models for device simulation and some of the related topics including super-junction concepts. Computer simulation of semiconductor devices with TCAD tools saves time and lowers the cost to design devices when compared to the experimental approach. In this chapter the semiconductor transport physics is described from the point of view of analysis of power semiconductor devices. Furthermore, some of the issues such as hot carrier effects and substrate current concerning of the lateral power devices are specifically discussed in this chapter.

In Chapter 4 new lateral power semiconductor devices are presented to overcome the problems concerning conventional device concepts. New and extended partial-SOI LDMOSFETs, lateral trench gate structures, and lateral SJ structures are suggested and analyzed. The two- and three-dimensional device simulator MINIMOS-NT is used for the simulations of these structures. It will be shown that the BV and $R_\mathrm{sp}$ can be improved by the new device concepts.

Finally, Chapter 5 briefly summarizes the work with some conclusions.