The increasing complexity of integrated circuits causes metalization layers to become more and more important, as more complex circuitry needs more interconnections and therefore a larger number of more densely packed interconnect layers. Together with the increase of chip size, the electrical behavior of the interconnecting layers gets more and more important for the operation of the whole circuit. Interconnect simulation analyzes the capacitances between different parts of the interconnect system to predict dynamic load and propagation delay. Simulations are performed in two or three spatial dimensions, sometimes including the non-linear behavior of the semiconducting material. Capacitances and resistances obtained from interconnect simulation are used in circuit simulation - together with data for the active devices - to compute the electrical behavior of the whole system.