8.7 Rule 7: A ground plane under an IC reduces EMI

Figure 8.12: A ground plane directly under the IC reduces the height of the IC current loop above ground from $d_{1}$ to $d_{2}$. This also reduces the $h_{1}$ to $h_{2}$.

The coupling to the enclosure field is reduced by

$$Ric_{12}=20\log\left(\frac{d_{2}/h_{2}}{d_{1}/h_{1}}\right)$$ (8.14)

With $d_{2}<d_{1}\ll h_{2}<h_{1}$ and $\Delta d=d_{1}-d_{2}$ the coupling reduction becomes

$$Ric_{12}\approx20\log\left(1-\frac{\Delta d}{d_{1}}\right)$$ (8.15)

Table 8.1 contains some examples for the achieved common mode coupling reduction with a ground plane directly under the IC. High reduction can be obtained for IC packages with low seating heights and for PCBs with only one inner layer ground plane which has a significant distance from the component layers.

Table 8.1: Common mode coupling reduction from a ground plane under the IC.

IC package loop height	$\Delta d$	Coupling reduction
mm	mm	dB
0.80	0.4	-3.5
0.80	1.6	-9.5
1.00	0.4	-2.9
1.00	1.6	-8.3
1.20	0.4	-2.5
1.20	1.6	-7.4

C. Poschalko: The Simulation of Emission from Printed Circuit Boards under a Metallic Cover