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List of Publications

P13
W. Pyka, P. Fleischmann, B. Haindl, and S. Selberherr, ``Three-Dimensional Simulation of HPCVD - Linking Continuum Transport and Reaction Kinetics with Topography Simulation,'' IEEE Trans.Computer-Aided Design, vol. 18, no. 12, pp. 1741-1749, 1999.

P12
W. Pyka, R. Martins, and S. Selberherr, ``Optimized Algorithms for Three-Dimensional Cellular Topography Simulation,''
submitted to Journal of Technology CAD.

P11
W. Pyka, V. Sukharev, K. Kumar, S. Joh, and J.E. McInerney, ``A 3D Integrated Simulation of Across-Wafer Metal Stack Gap-Fill for Local Interconnect Applications,'' in Proc. of the 16th International VLSI Multilevel Interconnection Conference, (Santa Clara, CA), pp. 477-479, September 1999.

P10
W. Pyka, H. Kirchauer, and S. Selberherr, ``Three-Dimensional Resist Development Simulation - Benchmarks and Integration with Lithography,''
accepted for publication in Microelectronics Engineering.

P9
H. Puchner, R. Castagnetti, and W. Pyka, ``Minimizing Thick Resist Sidewall Slope Dependence on Design Geometry by Optimizing Bake Conditions,''
accepted for publication in Microelectronics Engineering.

P8
P. Fleischmann, W. Pyka, and S. Selberherr, ``Mesh Generation for Application in Technology CAD,'' IEICE Trans.Electron., vol. E82-C, no. 6, pp. 937-947, 1999.

P7
W. Pyka, P. Fleischmann, B. Haindl, and S. Selberherr, ``Linking Three-Dimensional Topography Simulation with High Pressure CVD Reaction Kinetics,'' in Simulation of Semiconductor Processes and Devices, (Kyoto, Japan), pp. 199-202, Sept. 1999.

P6
R. Martins, W. Pyka, R. Sabelka, and S. Selberherr, ``High-Precision Interconnect Analysis,'' IEEE Trans.Computer-Aided Design, vol. 17, no. 11, pp. 1148-1159, 1998.

P5
W. Pyka, R. Martins, and S. Selberherr, ``Efficient Algorithms for Three-Dimensional Etching and Deposition Simulation,'' in Simulation of Semiconductor Processes and Devices (K. De Meyer and S. Biesemans, eds.), pp. 16-19, Leuven, Belgium: Springer, Sept. 1998.

P4
R. Martins, R. Sabelka, W. Pyka, and S. Selberherr, ``Rigorous Capacitance Simulation of DRAM Cells,'' in Simulation of Semiconductor Processes and Devices (K. De Meyer and S. Biesemans, eds.), pp. 69-72, Leuven, Belgium: Springer, Sept. 1998.

P3
R. Martins, W. Pyka, R. Sabelka, and S. Selberherr, ``Modeling Integrated Circuit Interconnections,'' in Proc. Int. Conf. on Microelectronics and Packaging, (Curitiba, Brazil), pp. 144-151, Aug. 1998.

P2
W. Pyka and S. Selberherr, ``Three-Dimensional Simulation of TiN Magnetron Sputter Deposition,'' in 28th European Solid-State Device Research Conference (A. Touboul, Y. Danto, J.-P. Klein, and H. Grünbacher, eds.), (Bordeaux, France), pp. 324-327, Editions Frontieres, 1998.

P1
W. Pyka and S. Selberherr, ``Three-Dimensional Simulation of Bulge Formation in Contact Hole Metalization,'' in Proc. International Conference on Modeling and Simulation of Microsystems Semiconductors, Sensors and Actuators, (Santa Clara, CA, USA), pp. 65-69, Apr. 1998.

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W. Pyka: Feature Scale Modeling for Etching and Deposition Processes in Semiconductor Manufacturing