5.2.1 Geometry and Simulation Parameters

The flip-chip solder bump structure used in electromigration analysis is sketched in (5.11).

Figure 5.11: Profile view of the solder bump geometry used for simulations. On the top of the Sn bump, a Ni UBM layer is placed. The arrow shows the direction of the electron flow.

Pure tin (Sn) has been identified as the best material for ultra fine pitch solder bumps, due to its baseline advantages of being electrodeposited and due to its low melting temperature [32]. The top and the bottom of the spherical bump contact the cathode and the anode copper metallization, respectively. On the top, the Sn solder bump is connected to the cathode through an UBM, which consists of a nickel (Ni) barrier layer. At the interface between Ni and Sn, an IMC will form due to electromigration and this region plays a key role when it comes to understanding the mechanism by which electromigration failure proceeds in solder bumps.

Table 5.3 lists the materials parameters obtained either by experimental or theoretical studies. The parameters are presented for the electro-thermal model, the vacancy dynamics model, and the solid mechanics model, as described in Chapter 3.

Table 5.3: Materials parameters for the electro-thermal, vacancy dynamics, and solid mechanics models [40, 38, 31].

Model	Parameter	Cu	Sn	Ni
Electro-thermal	σe,0 [S m-1]	5.35 107	3.8 107	1.38 107
	kt,0 [W (m K)-1]	379	63.2	90.7
	αe [K-1]	4.3 10-3	0	-
	αt [K-1]	0	0	-
	βe [K-2]	0	0	-
	βt [K-2]	0	0	-
	ρm [Kg m-3]	8920	5770	8900
	cp [J (Kg K)-1]	385	0.777	445
Solid Mechanics	E [GPa]	130	41.6	219
	ν	0.35	0.33	0.31
	αth [10-6 K-1]	16.5	0	13.4
Vacancy Dynamics	Dv,0 [cm2 s-1]	0.52	3.7 10-8	2.9
	Ea [eV]	0.89	0.25	2.88
	Z*	-5	-79	-10
	Q* [J]	1.2 10-20	1.2 10-20	1.2 10-20
	f	0.4	0.5	0.5
	Ωa [cm3]	1.18 10-23	1.18 10-23	1.18 10-23
	Cv,0 [cm-3]	1 1016	1 1016	1 1016
	τv [s]	1	1 1010	1

The simulation procedure presented in Section 4.3.2 is applied to the study of electromigration in the solder bump structure depicted in (5.11). Since failure analysis [32,33] have shown that failure in Sn bumps is mainly dominated by the mechanism of void nucleation at the bump/UBM interface, the simulation procedure is reduced to the case of void nucleation alone. Simulation starts by solving the electro-thermal problem in order to obtain the electric potential, current density, and temperature distributions in the structure. Then, the vacancy dynamics problem must be solved, followed by the mechanical stress problem in order to determine the distributions of vacancy concentration and stress, respectively. The simulation continues until the threshold stress for void nucleation is reached. Reaching the threshold stress implies void nucleation and the initiation of the rapid failure development at this location.

Electromigration simulations are carried out under accelerated test conditions, which are set by imposing the following boundary conditions to the solder bump structure in (5.11). The temperature is kept constant at T₀=473K for all external surfaces of the structure and the initial electric current density j₀=0.003MA/cm² is set at the anode end (copper metallization at the bottom of (5.11)). In turn, the zero electric potential condition is set at the top side of the cathode end (copper metallization at the top of (5.11)). For the mechanical problem, all outer surfaces of the structure are mechanically fixed.

The scope of this analysis is to identify the location with the highest probability of void nucleation in the structure by monitoring the distribution of the stress build-up due to electromigration. Then, the analytical solution of the model by Korhonen et al. [93] presented in Section 2.5.2, which describes the stress behavior in time, is a convenient reference for an initial guess in designing a compact model to predict the lifetime of the solder bump under the influence of electromigration.