5.2 Electromigration Reliability of Solder Bumps

As described in Section 1.3.2 flip-chip solder bump technologies are essential components for 3D integration because they enable a conductive contact between vertically stacked wafers. The technology consists of three components: solder bump, metallic bond pad on the substrate side, and thin film under-bump-metallization (UBM) on the chip side. The UBM, which separates the bump itself from the on-chip metallization, is important for the layout attached to the solder bump, because it reduces the current crowding near the contact between the solder bump and the surrounding metallization and contributes to longer electromigration lifetimes.

Although the solder bump with UBM show significant advantages, the mechanical and electrical properties of solder bumps influence the overall reliability of 3D integration technologies, as discussed in Section 1.3.3. A characteristic of solder bumps is that during the technology processing and use conditions, their material composition changes [31]. This compositional transformation is enhanced by electromigration. In particular, it has been shown that the formation of an intermetallic compound (IMC), caused by the material transport driven by the electric current density and the stress gradient, occurs at the interface between the solder bump and the UBM [34,110,111]. The IMC growth at this interface is accompanied by the formation of voids, which can cause a complete failure of the solder bump.

As described in Section 1.4.1, and further discussed in Section 5.1, the evolution of electromigration failure in a copper interconnect takes place in two distinct phases: a void nucleation phase and a void evolution phase. During the initial phase no effective resistance increase can be observed. The situation is quite different in the case of electromigration failure evolution in a solder bump, where an IMC layer is also present [32,33]. From the initiation of electromigration stressing, under accelerated conditions of increased temperature and current density, a continuous increase in the bump resistance is observed. After a certain period of electromigration stressing, the bump resistance starts to increase with a significantly steeper slope. Chen et al. [32,33] assume that the two slopes of the resistance growth represent two different stages of failure development: void nucleation combined with IMC growth and void evolution with IMC dissolution. Since interconnect electromigration resistance change with time is primarily determined by the void nucleation mechanism, the understanding of the early failure mode becomes decisive for a precise reliability assessment. The solder bump lifetime is influenced by the early phase of failure due to the presence of the IMC layer. Consequently, the prediction of the void nucleation time provides a realistic electromigration lifetime estimation of a given interconnect.

The electromigration-induced voiding at the interface between the IMC and the solder material plays an important role in controlling the electromigration lifetime of flip-chip solder bump technologies. The goal of the investigation of electromigration in solder bumps is to establish an accurate compact model for the prediction of the interconnect lifetime by means of theoretical analysis and FEM-based simulations.