4.3.2 Transient Device Characterization

The input data to the model , i.e., terminal currents and charges for a set of terminal voltages, can be obtained either by measurements or by process and device simulations. In this work we used VISTA with MINIMOS [54] to obtain the device data by simulation. All conductive currents can be obtained directly from DC measurements. The charge data are computed from transient simulations as shown in Fig. 4.1 for the case of a two-pole: the device is modeled as a quasi static black box which is equivalent to a non-linear conductance parallel to a non-linear capacitance C(v)=dq/dv. Applying a symmetric trapezoidal voltage v(t) to the device will result in a current i(t) which can be separated into a conductive and a capacitive component,

$$i_{\mathit{cond}}(v) = \frac{1}{2}\left[ i(t_1(v))+i(t_2(v)) \right],$$ (4.1)

$$i_{\mathit{cap}}(v) = \frac{1}{2}\left[ i(t_1(v))-i(t_2(v)) \right],$$ (4.2)

which is related to the charge by $i_{\mathit{cap}}(v) = {dq}/{dt} = (dq/dv)\cdot (dv/dt)$. Thus, the charge can be determined as

$$q(v) = q_0 + \int\limits_{v}^{v_0}{i_{\mathit{cap}}(u)du} .\qquad$$

The charge offset q₀ can be determined from q(0) = 0. In the case of the MOSFET we have a three-pole (assuming the source always grounded), one of the other terminals is ramped, and the currents at all terminals (including the ramped) are measured and subsequently converted to i/q-data.

Figure 4.1: Quasi static black-box model of a two-pole: separation of capacitive and conductive currents

To obtain a complete field of charge data, including the charge offset, a series of transient measurements/simulations is required as shown in Fig. 4.3. According to the desired ranges and step sizes of $\ensuremath{V_{\mathit{BS}}}\xspace$, $\ensuremath{V_{\mathit{GS}}}\xspace$, and $\ensuremath{V_{\mathit{DS}}}\xspace$, one transient in `` $\ensuremath{V_{\mathit{B}}}\xspace$-direction'', n transients in `` $\ensuremath{V_{\mathit{G}}}\xspace$-direction'', and n x m transients in `` $\ensuremath{V_{\mathit{D}}}\xspace$-direction'' are measured or simulated. The simulations in `` $\ensuremath{V_{\mathit{D}}}\xspace$-direction'' yield the main data set which is used for i/q extraction. The simulations in `` $\ensuremath{V_{\mathit{B}}}\xspace$-direction'' and `` $\ensuremath{V_{\mathit{G}}}\xspace$-direction'' are required for the charge offset computation. The steepness of the ramp determines the accuracy of the charge data and the influence of non-stationary effects accordingly. Both can be verified with single transient measurements, using the i/q-extraction software. For the simulation with MINIMOS the input decks are generated automatically according to the range settings which also control the computation of the current/charge data. Figure 4.4 shows a comparison with gate capacitance data obtained from accurate gate charge simulations using MINIMOS.

Figure 4.2: Terminal currents during a $\ensuremath{V_{\mathit{G}}}\xspace$ ramp $\ensuremath{t_{\mathit{r}}}\xspace = \rm 3ns$, $\ensuremath{V_{\mathit{D}}}\xspace , \ensuremath{V_{\mathit{B}}}\xspace , \ensuremath{V_{\mathit{S}}}\xspace = \rm 0V$ and extracted terminal charges (NMOS, 0.5V ULP technology)

Figure 4.3: Transient MOSFET simulations/measurements

Figure 4.4: Gate and gate-drain capacitance of an ULP n-channel MOSFET $V_{bs}=0\rm V$ determined with the transient method $t_r=\rm 3ns$ and computed through accurate gate charge integration using MINIMOS's GCHC option [27].

Typically, the number of required simulations is $1+n+nm = 1+5+5\cdot 20 \approx O(100)$ with one simulation taking several minutes. The task can be run in parallel [54] so that characterization of one device requires less than one hour on a modern workstation.