5. ULP-Compatible Mixed Analog Circuits

The recent development of low-power CMOS technologies has brought up a growing discrepancy between analog and digital technologies, especially, concerning the supply and threshold voltages. Traditionally, analog micropower designs favor higher threshold voltages $\ensuremath{V_{\mathit{T,np}}}\xspace$ and a supply voltage $\ensuremath{V_{\mathit{DD}}}\xspace > \rm 1V$ [83,84], which is still higher than the end-of-discharge voltage of a single alkaline cell ( $\approx\rm0.9V$) or the solar-cell voltage ( $\approx\rm0.4V$). On the other hand, high-performance digital ultra-low-power technologies, requiring a comparatively small gain per stage, are optimized by lowering the supply voltage and the threshold voltages to a minimum.

For low-power mixed-analog-digital (MAD) systems it would be advantageous to have ULP-compatible ultra-low-voltage (ULV) analog components such as operational amplifiers (OPAMPs), analog switches, and analog-digital converters to keep the process technology simple. To find the lower limits of the supply voltage a set of basic circuits designed with dedicated digital ULP processes was simulated to determine the achievable performance. In order to obtain reliable information on the reachable voltage gain the circuit simulations must be performed with a highly accurate and robust device model (this was also a major motivation to develop the model developed in Section 4.3). Simulations carried out with MINISIM using this model could show the feasibility of ultra-low-power OPAMPs as well as other analog key components working at supply voltages well below $1\rm V$. The big advantage of this strategy is the compatibility of analog and digital devices which enables a simple ULP mixed-analog-digital process technology without compromising performance on the systems level.