The ULP realization is shown in Fig. 5.14. The design uses only inverters and tri-state inverters, and two further components: a resistor R1 and a capacitor C1. While C1 and R2 are fairly uncritical (their non-linearities can be modeled with an additional quantization non-linearity), the linearity of R1 is essential. The supply voltage is 0.2V, the input signal bandwidth is 1MHz and the oversampling frequency is 100MHz (this amounts to an oversampling ratio of 5.6 octaves).
Fig. 5.15 shows the simulation result from the conversion
of a 100kHz sine signal.
The in-band spurious signals are essentially white noise and
some small harmonic components.
The latter are not due to harmonic distortions, they are caused by
granular cycles, which occur when the value of
is rational.
Such unwanted tones can be reduced by dithering, i.e., by adding a
small noise signal to the input (and subtracting it digitally from the
output).
The white-noise component, which is significantly greater than the
in-band noise predicted by the ideal 9dB/octave formula, is caused
by the finite gain A of the integrator: the output signal of the
integrator appears at its input as
.
This error
signal
which has a random saw-tooth-like shape, is not noise-shaped
because it is introduced before the integrator, so its spectrum is
white.
The SNR determined from the spectrum is 33dB, which is 17db less
than the ideally expected 50dB.
Harmonic distortions of the output in this circuit can only occur,
when the input signal becomes so large that the integrator starts
to saturate. In this case the error signal at the integrator input
becomes correlated to the input signal, which results in harmonic
distortions of the output (see also Figs. 5.17 and 5.18).
To obtain a sufficient resolution in the frequency domain several periods of the input signal must be simulated (8 periods in this case). Such simulations can be quite expensive in terms of CPU time when the whole circuit is simulated on the transistor level. Typical simulation times for this circuit with MINISIM on a DEC Alpha Station 600 are 24 hours.