next up previous contents
Next: List of Symbols Up: Dissertation Alireza Sheikholeslami Previous: Contents

List of Acronyms

BTRM Ballistic Transport and Reaction Model
CBCM Charge Based Capacitance Measurement
CD Critical Dimensions
CFL Courant-Friedrichs-Levy
CMOS Complementary Metal Oxide Semiconductor
CMP Chemical Mechanical Planarization
CPU Central Process Unit
CVD Chemical Vapor Deposition
ECAD Electronic Computer Aided design
ELSA Enhanced Level Set Applications
IADF Ion Angular Distribution Function
IC Integrated Circuit
ILD Interlevel Dielectric
IPD Input Deck Library
LDMOS Laterally Diffused MOS
LPCVD Low Pressure Chemical Vapor Deposition
MOS Metal Oxide Semiconductor
MOSFET Metal Oxide Semiconductor Field Effect Transistor
PDE Partial Differential Equation
PECVD Plasma Enhanced Chemical Vapor Deposition
PIF Profile Interchange Format
PSLG Planar Straight Line Graph
PVD Physical Vapor Deposition
RCX Resistance and Capacitance Extraction
RESURF Reduced Surface Field
RF Radio Frequency
RIE Reactive Ion Etching
SEM Scanning Electron Microscope
SOI Silicon-On-Insulator
SIESTA Simulation Environment for Semiconductor Technology Analysis
SPICE Simulation Program with Integrated Circuit Emphasis
TCAD Technology Computer Aided Design
TMOSFET Trench MOSFET
TCO Total Cost of Ownership
TEOS Tetraethoxysilane, $ Si(OC_{2}H_{5})_{4}$
ULSI Ultra Large Scale Integration
UV Ultraviolet
WSS Wafer State Server


next up previous contents
Next: List of Symbols Up: Dissertation Alireza Sheikholeslami Previous: Contents

A. Sheikholeslami: Topography Simulation of Deposition and Etching Processes