Next: 1.2 Main Physics-Based Concepts for HCD Modeling Up: 1. Introduction Previous: 1. Introduction
The first successful attempt to model HCD was the so-called "lucky-electron" model proposed in 1979 by Hu [7,5]. This concept is based on the following assumptions: an electron characterized by an energy high enough to overcome the potential barrier at the interface impinges onto the interface without collision. That is, without energy loss and without being scattered back into the channel and being emitted into the SiO2 conduction band thereby producing a defect. The "lucky electron" model claims that the threshold of HCD is 3.7eV, however, hot-carrier stresses performed at Vds < 3V demonstrated that device aging can also occur at lower voltages [8]. As a consequence, this approach fails for short-channel devices with lower operating voltage. However, due to its simplicity, the model still remains one of the most popular approaches.
An empirical extension of the "lucky electron" model was proposed in 1983 by Takeda and Suzuki [4,9]. This simple time dependent model expresses the transconductance degradation and/or threshold voltage shift ΔVth. The exponent and proportionality coefficients are fitting parameters adjusted independently for a particular device architecture. The advantage of such an approach is that it allows for an easy extrapolation of the device life-time from accelerated hot-carrier stress conditions to real operation biases. However, the applicability of the model is rather limited as demonstrated by investigations employing lightly doped drain structures where the saturation of degradation after a certain value has been observed (see [10] and references therein). Although inaccurate for describing hot-carrier degradation, the Takeda model inspired a number of fitting models. These models try to represent device parameter degradation employing some combinations of time exponents. Among them are the Goo model based on the "lucky electron" concept, which can capture saturation of degradation [10], the Dreesen model [11,12], which follows the same strategy but was adapted for lightly doped drain MOSFETs and is able to successfully represent the Idlin degradation in the range of ΔIdlin=0.02%...10%.
Other extensions of the Hu concept have been proposed by Woltjer [13,14] and by Mistry et al. only 10 years later. [15,16]. In contrast to the "lucky electron" model, which deals with interface trap generation under maximum substrate current conditions but fails at other stress conditions, the Woltjer model considers the oxide field as significant for the creation of interface states. As a result, a field-driven correction is incorporated into the "lucky electron" model. This extension gives description of the degradation behavior of devices with various dimensions and oxide thicknesses. Mistry and co-workers reported that a single degradation mechanism is not sufficient for proper degradation modeling and three different modes of damage were proposed: at low Vgs creation of interface states and oxide neutral electron traps occurs, while for mid and high Vgs only interface state build-up and oxide electron traps contribute. All of them are present during direct current (DC)-stress and each of them can dominate the alternating current (AC)-stress life-time [16]. However, the life-times predicted by this model were rather inaccurate and thus only of limited applicability. Moreover, the general shortcoming of these approaches is that starting from a certain node and beyond, the field-driven paradigm and related modeling approaches, such as extensions of the "lucky electron" model, should be substituted by energy-driven concepts [8,17,18].
The idea that two (or several) competing degradation mechanism are required to describe the overall degradation has been further extended in 2003 by Moens et al. in order to capture degradation in lateral diffused metal-oxide-semiconductor (LDMOS) transistors [19,20,21,22]. In a series of papers Moens demonstrated that for high-voltage devices one should consider defect build-up in different transistor sections, namely in the channel, accumulation, and bird's beak regions. As a result, different components of the damage are characterized by different time exponents, which explains the different slopes of parameter degradation. The dynamic behavior was reported to be determined by a hole trapping/detrapping processes [19,21].