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Next: 3.4 Extended Single-Mode AC Up: 3. Small-Signal AC Analysis Previous: 3.2 Overview of the

Subsections



3.3 Standard Single-Mode AC Analysis

This section deals with the basic settings and configuration of the small-signal simulation mode. In addition, some information about the internal implementation is given. As transient and small-signal analysis are related simulation modes, their setup and configuration is very similar (see Appendix A.1).

3.3.1 Introduction

The AC steps are based on a fully converged steady-state operating point, Therefore, it has to be ensured, that a DC simulation is started prior to any AC step. Note that this is also implicitly the case for transient simulations. During initialization of a transient or small-signal simulation, the internally used time or frequency representation is updated. Due to the backward Euler discretization the transient simulation mode requires the difference between two time points. Thus, in addition to the current time point also the last point has to be stored.

All models obtain the reciprocal time as input, which is used by the transient models to calculate their time-dependent contributions to the equation systems. Depending on the simulation mode, the variable contains either the reciprocal time difference or the angular frequency. Therefore, it is set as follows:

\begin{gather*}\begin{split}r_{\mathrm{transient}} = \displaystyle\frac{1}{t_0 - t_1}\ , \\ [2mm] r_{\mathrm{ac}} = 2 \pi f\ . \end{split}\end{gather*} (3.13)

This value is then passed to each model, indicating a DC step in case of zero and a transient or small-signal step in case of non-zero values. All models are subsequently called to add their contributions to the linear equation system. In order to excite the device, the user can specify the complex-valued amplitude of each terminal of the device.

3.3.2 Simulation Example

These standard small-signal capabilities will be demonstrated on a simple diode as shown in Figure 3.6. In the example discussed below, the capacitances over a wide range of frequencies are extracted. The anode voltage is an additional parameter of the simulation. Refer to Appendix A.3 for further details on the simulation setup.

Figure 3.6: Simple diode structure under investigation. The boron concentration in the p-doped half on the left is $ 1\times 10^{17}\ {\textrm {cm}}^{-3}$ equal to the phosphorus concentration in the n-doped part of the diode.
\includegraphics[height=0.28\linewidth]{figures/simple_diode2.eps} \includegraphics[height=0.28\linewidth]{figures/cut2.eps}

In addition, the diode was also subject to transient simulations in order to demonstrate the generation of harmonics when the device is excited with large signals. Three different amplitudes $ A$ were used in the signal applied at the amplitude:

$\displaystyle V_\mathrm{Anode} = V_0 + A \sin(2 \pi f t)\ ,$ (3.14)

with $ V_0 = -0.5\,$V, $ f = 1\,$MHz, and the time stepped from 0$ \,$s to 2$ \,\mu$s in 2,048 steps (two periods). The last 1,024 data points of the cathode currents were the input for the Fast Fourier Transformation [165]. In the left figure of Figure 3.7, the results of the transient simulations are shown for all four amplitudes $ A = 10\,$mV, $ A = 250\,$mV, $ A = 500\,$mV, and $ A =
1\,$V. Note that the cathode currents are scaled to fit in the same graph. The right figure depicts the results of the Fast Fourier Transformation.

The upper left side of Figure 3.8 shows the comparison of the simulation results with those obtained by the commercial simulator DESSIS [111]. The other three figures compare small-signal and transient simulation results of MINIMOS-NT. For an anode voltage of $ -0.8\,$V, both modes are used to extract the capacitances and arguments. In the lower right figure the simulation effort and the relative error of the transient results in comparison to those obtained by the small-signal mode are shown. It is important to note that the transient mode requires more than twice the time of the small-signal mode for only ten steps. For 1000 transient steps, the effort is more than 60 times larger than for the small-signal simulation.

Figure 3.7: The left figure shows the results of the transient simulations for the three amplitudes $ A = 10\ $mV, $ A = 250\ $mV, and $ A = 1\ $V. The small figures depict the results of the Fast Fourier Transformation of the respective cathode currents.
\includegraphics[width=\linewidth]{figures/time.eps}
\includegraphics[width=0.49\linewidth ]{figures/fft1_3.eps} \includegraphics[width=0.49\linewidth ]{figures/fft500_3.eps}
\includegraphics[width=0.49\linewidth ]{figures/fft250_3.eps} \includegraphics[width=0.49\linewidth ]{figures/fft10_3.eps}

Figure 3.8: The upper left figure compares the small-signal results of MINIMOS-NT and DESSIS. The other three figures compare the small-signal results of MINIMOS-NT with its transient results: In the upper right figure the capacitance versus the frequency is shown. The argument versus the frequency is given in the lower left figure. In both figures, different number of periods (P) and number of steps per period (S) are compared. Finally, the dependence of the relative errors and the time scaled to the small-signal result (time ratio) on the number of transient steps is illustrated in the lower right figure. The number of periods is $ 2$, the frequency is 1$ \,$MHz and the transient data is compared with the small-signal results. The trade-off between the reduction of the relative errors and the increasing computational effort can be clearly seen.
\includegraphics[width=0.49\linewidth ]{figures/diode_dessis.eps} \includegraphics[width=0.49\linewidth ]{figures/diode_cabs2.eps}

\includegraphics[width=0.49\linewidth ]{figures/diode_carg3.eps} \includegraphics[width=0.49\linewidth ]{figures/diode_erel3.eps}


3.3.3 Extraction of the Cut-Off Frequency

Frequency stepping can be based on several approaches (see Section 3.1.3). One possibility is to apply a conditional stepping algorithm which is directly stepping to the unity gain point. Such a method is not only faster and more accurate, but additionally makes a post-processing for interpolations or extrapolations obsolete. As for a bipolar transistor $ \beta$ is defined as

$\displaystyle \beta(f) = \frac{\vert i_{\mathrm{C}}(f)\vert}{\vert i_{\mathrm{B}}(f)\vert}\ ,$ (3.15)

one can easily obtain a nonlinear function

$\displaystyle F({\beta}) = \beta - 1.0 = 0 \ .$ (3.16)

The objective of the conditional stepping is to find the root of the function (3.16) with an error below a specified value. As such a simulator capability can be applied to extract also other quantities, for example the threshold voltage, it is generally implemented and derived in the following.

Basically, the root of the nonlinear function $ F$ is bracketed in the interval $ \mathrm{[f_{\mathrm{l}}, f_{\mathrm{u}}]}$. The values $ F(f_{\mathrm{l}})$ and $ F(f_{\mathrm{u}})$ have opposite signs and the function is continuous, for that reason one root lies in the interval given. The conditional stepping algorithm is based on the well-known Regula Falsi (False Position) algorithm. According to [165] the nonlinear function is assumed to be approximately linear in the local region of interest.

False Position converges less rapidly than the related Secant method. In contrast to a Newton method which requires the derivatives, only the actual function values are used. For that reason, the algorithm can be directly integrated in the respective stepping module (see Appendix B).

The first two iteration steps are used to obtain the initial values $ F(f_{\mathrm{l}})$ and $ F(f_{\mathrm{u}})$ at the specified start boundaries $ f_{\mathrm{l}}$ (lower boundary) and $ f_{\mathrm{u}}$. These values must have opposite signs, otherwise the method fails. The next value is found at the intersection of the line connecting these two points. This line is given by $ L$:

$\displaystyle L(f) = F(f_{\mathrm{l}}) + (f - f_{\mathrm{l}}) \frac{F(f_{\mathrm{u}}) - F(f_{\mathrm{l}})}{f_{\mathrm{u}}- f_{\mathrm{l}}}\ .$ (3.17)

Separating the intersection frequency $ f_{\mathrm{I}}$ ($ L(f) = 0$) yields

$\displaystyle f_{\mathrm{I}}= f_{\mathrm{l}}- F(f_{\mathrm{l}}) \ensuremath{\frac{f_{\mathrm{u}}- f_{\mathrm{l}}}{F(f_{\mathrm{u}}) - F(f_{\mathrm{l}})}}\ .$ (3.18)

Depending on the sign of $ F(f_{\mathrm{I}})$ either the lower or the upper boundary is replaced by $ f_{\mathrm{I}}$. The loop is terminated if $ F(f_{\mathrm{I}})$ is smaller than the accuracy given or if the maximum iteration count is reached.

For $ f_\textrm {T}$ extraction this algorithm seems to be promising as the frequency characteristics are indeed an approximately linear function (in the area of interest) with only one root. However, an important drawback of this approach is the use of fixed boundaries $ f_{\mathrm{l}}$ and $ f_{\mathrm{u}}$. First, the frequency range of a $ f_\textrm {T}$ extraction can be very wide, especially if more than one operating point is required. Second, the method fails if both values $ F(f_{\mathrm{l}})$ and $ F(f_{\mathrm{u}})$ have the same sign. Third, the method converges slowly if the interval $ \mathrm{[f_{\mathrm{l}}, f_{\mathrm{u}}]}$ is very wide. To overcome this trade-off between usability and performance, the boundaries $ f_{\mathrm{l}}$ and $ f_{\mathrm{u}}$ are always reread during the simulation. Furthermore, an automatic adaptation is provided such that too narrow boundaries are automatically extended. This allows on the one hand side the specification of very narrow boundaries, which is important to speed up the convergence, and exempt the user of finding practicable values for $ f_{\mathrm{l}}$ and $ f_{\mathrm{u}}$, which can be a cumbersome task.

In order to quantify these considerations, an evaluation of various boundary settings and error values has been performed. The narrowness of the boundaries $ N$ in respect of an $ f_\textrm {T}$ (which is already known) means, that the lower and upper boundaries equal $ {\ensuremath{f_\textrm{T}}} \pm N$, respectively ( $ \ensuremath{f_\textrm{T}}= 35.8\,$GHz). In Figure 3.9 the effort for the extraction of $ f_\textrm {T}$ in terms of the required steps is analyzed. The left figure shows the iteration steps for two different sets of boundaries. The right figure compares various boundaries and errors. It can be seen that a significant speed-up can be achieved with narrow boundaries even for very accurate simulations.

Figure 3.9: These figures analyze the effort for the extraction of $ f_\textrm {T}$ by conditional stepping. On the left side, two different sets of lower and upper boundaries are compared for an error value of $ 10^{-3}$. Whereas for the wide boundaries of 10$ \,$GHz and 100$ \,$GHz 24 steps are required, the narrow boundaries of 30$ \,$GHz and 40$ \,$GHz reduce this effort down to five steps. On the right side, the number of steps depending on the narrowness of the boundaries for different errors are shown.
\includegraphics[width=0.49\linewidth ]{figures/ft_cond.eps} \includegraphics[width=0.49\linewidth ]{figures/ft_steps.eps}

In Figure 3.10, extracted cut-off frequencies for MOS transistors with different gate lengths and the three transport models as discussed in Chapter 2 are shown. The results obtained by the small-signal simulation mode of MINIMOS-NT are compared with Monte Carlo data [83] and results based on the quasi-static approximation. The latter are obtained as a result of steady-state simulations. By applying the quasi-static approximation, the following definition can be used for MOS transistors [115,217]:

$\displaystyle \ensuremath{f_\textrm{T}}= \frac{1}{2 \, \pi} \, \displaystyle \f...
... \Delta V) - \ensuremath{Q_\mathrm{G}}(\ensuremath{V_\mathrm{G}}-\Delta V)} \ ,$ (3.19)

with the gate voltage $ \ensuremath{V_\mathrm{G}}$ varied and all other voltages kept constant. The quasi-static simulation results differ from those of the small-signal mode, which is evident due to the approximation and in consistence with the results reported in [142]. The quasi-static approach, which consists of two steady-state steps, has general performance advantages over the small-signal simulations. If a conditional stepping is applied as discussed before, the number of steps depends on the narrowness of the boundaries. As one can assume that the first steady-state step is a good initial guess for the second one for the quasi-static simulation, the small-signal simulations generally require more computational resources in terms of simulation time than the quasi-static approximation. However, as can be seen in Figure 3.10, the error compared to the exact result can be quite significant.

Figure 3.10: In the left figure, the three transport models are compared with quasi-static simulation results of MINIMOS-NT as well as with Monte Carlo data. The right figure shows the cut-off frequency depending on the gate voltage. Whereas for larger devices, the difference is again minimal, the superiority of the six moments transport model for smaller devices can be clearly seen.
\includegraphics[width=0.49\linewidth ]{figures/ft2.eps} \includegraphics[width=0.49\linewidth ]{figures/ftfull2.eps}


next up previous contents
Next: 3.4 Extended Single-Mode AC Up: 3. Small-Signal AC Analysis Previous: 3.2 Overview of the

S. Wagner: Small-Signal Device and Circuit Simulation