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Subsections
A. Wafer-State-Server Environment
The Wafer-State-Server [77] has been developed to integrate several
three-dimensional process simulation tools used for etching and deposition, ion
implantation, and thermal annealing processes. The Wafer-State-Server is an
advanced software library for storage, access and manipulation of simulation data.
It holds the complete information describing the simulation domain in a volume
mesh discretized format and it provides convenient methods to access these data.
On the on hand, process simulators make use of the provided access methods to
initialize their internal data structures (due to performance reasons), and on
the other hand, the simulators report their modifications of the wafer structure
to the Wafer-State-Server. Thereby a consistent status of the wafer structure
can be sustained during the whole simulated semiconductor manufacturing process
flow.
Figure A.1:
Conceptional view of the Wafer-State-Server.
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The goal of the Wafer-State-Server is to store all properties of the simulation
domain and to provide convenient methods to access and to modify these properties.
Three major problems have to be solved by the Wafer-State-Server, namely I/O
operations, meshing, and the handling of the topology of the simulation domain and
of the distributed quantities contained in the simulation domain. Corresponding to
these three TCAD problems, the Wafer-State-Server provides three logical layers.
Fig. A.1 shows the layers I/O, Core Data Management, and
Meshing as well as their interactions.
The I/O layer contains various data adapters to support the WSS format and other
file formats. The Core Data Management layer takes care of data storage, point
location, and topological operations like extracting the hull of a geometry or finding
the interface between two geometries. Finally, the meshing layer handles all sort
of gridding tasks, for instance, the interpolation of attributes from one grid onto
another one. The layers are designed in an object-oriented way. Each layer consists of
an interface and an implementation part. Within the Wafer-State-Server the functionality
of a layer is exclusively accessed via the layer interface. This ensures that the
desired implementation or algorithm of the problem can be controlled by the simulator
without the need of changing the program code within the Wafer-State-Server library.
The simulator instantiates an object of the desired class that implements the
interface. Due to the support of dynamic instantiation of implementations, the desired
algorithm can be selected at runtime. Fig. A.2 gives an overview of the
defined interfaces which are visible from the application. Except for the point-location,
all implementations inherit from their parent class. The implemented point-location code
uses the C++ template mechanism to support several implementations. The syntactically
more complicated template polymorphism was chosen to ensure the best possible
performance for algorithms defined on the core data-structures. In addition to pure
point-location functionality, the point-location interface provides topological
analysis methods too, while the wafer interface itself provides global repair
and update mechanisms for the simulators.
Figure A.2:
Public interfaces of the Wafer-State-Server.
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The WSS format is an ASCII-based file-format which allows for an easy ``by hand''
generation of simple geometries. Since the Reader and Writer
interfaces are implemented, the WSS file format is the native file format for the
Figure A.3:
Example of a WSS file for a structure with two material segments.
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simulation of ion implantation with MCIMPL-II. The WSS format is a hierarchical data
structure where the top-level object is the Wafer. The Wafer
contains several sub-objects called Segments. A segment describes a single
connected region within the wafer (simulation domain) with similar physical properties,
for instance, a region consisting of one material. This does not mean that one
material has necessarily to be modeled by only one segment. No matter how complex
a simulation domain is, it can always be composed of single connected regions.
Fig. A.3 shows a one-dimensional input WSS file for the simulation of ion
implantation with MCIMPL-II. The described target is a silicon wafer which
has a native oxide layer of 1nm in thickness on its surface.
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Up: Dissertation Robert Wittmann
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R. Wittmann: Miniaturization Problems in CMOS Technology: Investigation of Doping Profiles and Reliability