7. Summary and Outlook

This work aims to utilize a LS framework in order to broaden the spectrum of available process topography simulations to include processes which have recently garnered attention due to numerous advantages they possess over traditional processing techniques. The framework has previously been implemented in order to simulate a topography changing due to the application of CVD, plasma etching, anisotropic wet etching, CMP, and focused ion beam processes. In this work, the framework is expanded to accommodate models for silicon oxidation, NAOS, AFM lithography, spray deposition, and BiCS memory hole etching.

Thermal oxidation of silicon is a process by which a silicon bulk is converted into silicon dioxide in an oxygen-rich environment under a high temperature. The models used in order to enable these simulations rely on a parabolic linear description of oxide growth along with some additional two-dimensional effects. The ``bird's beak'' effect during LOCOS oxidation can be reproduced, when the geometrical movements of the nitride mask are known with respect to the oxide thickness. The simultaneous movement of multiple surfaces is performed, because oxide growth experiences motion on both interfaces (Si-SiO$_2$ and SiO$_2$-ambient). The implemented oxidation growth models are based on one-dimensional descriptions of the oxidant diffusion. However, expanding the LS framework to include the diffusion of species through a volume results in a much more accurate post-oxidation surface description. This process is quite complex; when the sparse field LS is implemented, since the explicit location of the surface or distribution of oxidant concentrations is not available. Others have solved this problem by simultaneously simulating diffusion in a separate FEM-based simulation space and feeding this information into the LS framework. This is an interesting approach but a future implementation of diffusion within the LS environment would be a valuable expansion to the present model. Through thermal oxidation, a high quality oxide can be grown on a silicon wafer. However, high temperatures ($\sim$1000 $^{\textrm {o}}$) are required to perform these processes. This is sometimes undesirable, since high temperatures influence the distribution of impurities in the silicon bulk and some devices require a high quality oxide to be grown in the presence of glass substrates, limiting the allowed ambient temperatures. An alternative to thermal oxidation for the growth of thin films is presented in the form of NAOS. An empirical model for NAOS is presented and included in the LS framework.

Silicon dioxide is a very useful masking tool during etching and ion implantation steps for surfaces below it. Through the introduction of LON the ability to grow nanosized patterns on a silicon wafer enabled the generation of nanosized devices, such as junctionless transistors. A model for the surface deformation after the application of a negatively-charged AFM needle in intermittent contact and non-contact modes has been presented. The AFM needle is modeled as one or more charged dots. A MC technique is utilized in order to generate a particle distribution which reflects the surface charge density resulting from the introduced electric field. The ray tracing technique is then used to accelerate these particles to the LS surface, where a pattern is generated and the expected resulting topography is produced. Models for nanodots and nanowires are introduced to the LS framework. The model is able to handle a hemispherical needle tip by modeling it using a single dot charge or a rough needle tip, using multiple dot charges which are placed such that they mimic the applied electric field. An interesting extension of this model would be the introduction of AFM needle arrays, which are commonly used in order to increase the process throughput. The effects of the neighboring AFM needles could be analyzed along with a suggestion regarding the minimum distance between AFM needles placed in an array so that the desired pattern is unaffected.

Two other processes, which have garnered some attention recently have also been implemented within the LS framework. Spray pyrolysis deposition, which is a cost effective method for the deposition of thin material films on a silicon substrate has been introduced. The model examines the changing topography, when multiple droplets undergo trajectories dictated by the applied forces, finally striking the surface for deposition. In addition, a model similar to CVD deposition is suggested, when the droplets can be seen as a flux and not as individual particles and when they evaporate near the surface but prior to fully contacting the wafer in liquid form. Three-dimensional BiCS based memories are speculated to be the next step towards increasing memory capacity without technology node reduction, since the currently used NAND gate cannot be miniaturized below the 10nm node. The BiCS concept is the utilization of vertical storage so that area can be preserved and increasing memory capacity can be made much more cost effective. The main issue concerning BiCS is the difficulty in fabricating such complex structures, mainly the etching of multiple Si and SiO$_2$ layers. Sixteen interchanging layers of Si and SiO$_2$ must be etched through a hole with a diameter of approximately 50nm, if the technology is to be cost effective. A model for the etching of silicon and silicon dioxide has been implemented, taking into account the effects of the stacked structure.

Many implemented processes require long simulation times, especially those using a MC particle distribution and ray tracing techniques. Some simulations, such as AFM lithography with a rough needle tip, cannot be performed with an explicit particle distribution but rather rejection sampling must be used. With increasing aspect ratios and modeling requirements, parallelization becomes essential. The LS code implements an OpenMP framework for parallelization on shared memory machines. Introducing the MPI to the simulator could allow for smaller simulation times and a greater precision, both with a finer mesh and with a larger number of MC particles in the simulation domain.