Over the last several decades, Moore’s law has successfully predicted the persistent miniaturization of semiconductor devices, such as the transistors in microprocessors [1]. Following that and owing to the continuous demand for cheap electronics with increased performance, CMOS scaling became the key to stay competitive on the semiconductor market. The ITRS [2] offers a commonly accepted guideline for a collective effort to the upcoming technology generations. Due to the struggle to keep control over the channel in CMOS devices when scaling them down, new processes, materials, and device structures were introduced [3], e.g., local and global strain techniques, high-k/metal gates, and multi-gate three-dimensional transistors [4]. It is hereby mentioned that while introducing the new technologies the speed, size, leakage [5], economic limitations [6], and power consumption of the transistors have been kept in the mind.
The principle of MOSFET operation is based on the charge degree of freedom. The charge of an electron interacts with the gate induced electrostatic field, which in turn controls the electron flow in the channel by modulating the potential barrier. Attempts to use another fundamental property of an electron, its spin, have given rise to a new and rapidly evolving field known as spintronics. It is an acronym for spin transport electronics that was first introduced in 1996 to designate a program of the U.S. Defense Advanced Research Projects Agency (DARPA) [7]. The electron spin state is characterized by one of its two possible projections on a given axis, and thus could be potentially used in digital information processing. Two major transport parameters viz. spin lifetime and the spin diffusion length determine the scale of coherence in spintronic devices [8]. Since these parameters are several orders of magnitude larger in semiconductors than in metals [9, 10], semiconductors are promising materials for the spintronics research. Utilizing the spin properties in semiconductors also opens great opportunities to reduce the device power consumption for future electronic circuits, as it takes an amazingly small amount of energy to invert the spin orientation which is necessary for low power applications [11]. In modern times, spintronic devices [12, 13, 14, 15, 16]; particularly magneto-resistive devices [17] with a tunnel barrier junction structure [18]; are strong candidates to be used in memory technology due to their non-volatility and compatibility with CMOS technology [19, 20]. One has to mention that by using the inherent quantum mechanical nature of spin to construct quantum computers for quantum information processing and efficient quantum mechanical simulations is also under investigation [21, 22].