5.2 Parameter Extraction of a Fusing Structure

Process technology nodes with $0.35$ micron feature size and below offer the opportunity to integrate fuses made of polycrystalline interconnect materials for programmable memory cells. In technology nodes with larger feature sizes, the programming of a fuse can cause severe damage to the passivation layers.

With these fusing devices one can provide silicon circuits with several kilobits of cheap, non-volatile, and area-saving memory cells which can be programmed even during device operation. Rather new developments have been reported which provide tri-state fusing structures [336] as well as special fusing geometries that provide a reliable programming process [88,89,150]. Another important type of application is to use these fusing structures as field programmable gate arrays for trimming circuits [337]. In addition, fuses can be used as elements for programmable arrays for capacitors and resistors [338]. Moreover, fuses can also be used as protective elements for critical components [339].

With the help of sophisticated simulation and optimization tools new models can be developed and calibrated to provide more information to shorten the fusing time and to improve reliability. The main goal of this project was to identify the thermal impact of the electrical and thermal conductivities of the contributing materials.