D I S S E R T A T I O N

Emulation and Simulation of
Microelectronic Fabrication Processes

ausgeführt zum Zwecke der Erlangung des akademischen Grades
eines Doktors der technischen Wissenschaften

unter der Betreuung von

Asst.Prof. Privatdoz. Dr.techn. Lado Filipovic, MASc.
O.Univ.Prof. Dipl.-Ing. Dr.techn. Dr.h.c. Siegfried Selberherr

eingereicht an der Technischen Universität Wien
Fakultät für Elektrotechnik und Informationstechnik
von

Xaver Klemenschits, MSci.
Matrikelnummer: 11708463

Wien, im Juli 2022  

Abstract

The fabrication of increasingly powerful microelectronic processors, enabled by transistor scaling, has been a main driver of technological progress in most fields since the 1950 s. Until recently, this scaling of electronic components was mainly achieved through improved control of process conditions, rather than innovations in fabrication techniques. However, with the introduction of new materials and three-dimensional transistor structures, processing techniques have become highly complex and expensive. Therefore, process technology computer aided design (TCAD) has become indispensable for manufacturers in order to evaluate possible future technologies. The simulation of manufacturing processes has already become essential in modern design technology co-optimisation (DTCO) cycles which are used to produce the next generation of smaller, more efficient and more performant semiconductor circuits.

The capabilities of a process simulator are often restricted by the numerical methods underlying its operation. Most simulators employ the level set method for the description of evolving material interfaces during manufacture. However, sharp edges, which might occur during epitaxial crystal growth, cannot be handled appropriately due to fundamental limitations of this method. In order to solve this problem, a novel numerical scheme for the exact description of crystal facet evolution was developed within this work, which finally allows epitaxial processes to be described accurately within a level set description.

Recently, the emulation of process steps, which aims to reproduce the geometric outcome of processes rather than simulating the underlying physics, has become increasingly important for advanced DTCO cycles due to its high computational efficiency. Using emulation, complex transistor structures can be generated within seconds, allowing for the fast evaluation of new transistor geometries using combined device and circuit simulations. Within the scope of this work, for the first time, the emulation of fabrication processes in the level set has been made possible through the design and implementation of a geometric advection algorithm. This algorithm allows for large changes in material interfaces to be modelled in a single step.

The development of these fundamental techniques and their implementation in a single process modelling framework, ViennaPS, combines highly physical process simulation capabilities with computationally efficient process emulation and thus allows for a full description of modern and possible future manufacturing techniques. Therefore, this work provides the missing link between process emulation and simulation, finally enabling the unrestricted combination of both methods to accelerate DTCO cycles and thus the discovery of novel technologies for semiconductor fabrication.

Kurzfassung

Die Herstellung von immer leistungsstärkeren Mikroprozessoren durch die Verkleinerung von Transistoren ist bereits seit den 1950 er Jahren ein Haupttreiber für technologischen Fortschritt in fast allen Bereichen. Bis vor Kurzem konnte diese Verkleinerung hauptsächlich durch bessere Kontrolle von Prozessbedingungen und ohne drastische Änderungen der Herstellungstechnik erzielt werden. Durch die Einführung von neuen Materialien und dreidimensionalen Transistorgeometrien wurden diese Prozesse jedoch komplex und teuer. Daher wurde Technology Computer Aided Design (TCAD) für Hersteller unverzichtbar, um mögliche Technologien der Zukunft zu evaluieren. Die Simulation von Herstellungsprozessen ist daher essenziell für moderne Design Technology Co-Optimisation (DTCO) Zyklen, mit denen die nächste Generation von kleineren, effizienteren und leistungsstärkeren Halbleiterschaltkreisen produziert wird.

Die Fähigkeiten eines Prozesssimulators sind häufig durch die verwendeten numerischen Methoden eingeschränkt. Die meisten Simulatoren basieren auf der Level Set Methode um bewegte Materialoberflächen während der Herstellung zu beschreiben. Jedoch können scharfe Kanten, welche in Epitaxieverfahren entstehen können, durch fundamentale Limitierungen dieser Methode, nicht angemessen beschrieben werden. Um dieses Problem zu lösen, wurde in dieser Arbeit ein neuartiges Advektionsschema für die genaue Beschreibung von Kristallflächen entwickelt, welches es möglich macht, Epitaxieverfahren in einem Level Set zu beschreiben.

Die Emulation von Herstellungsschritten, welche statt der grundlegenden Physik eines Prozesses nur das geometrische Ergebnis beschreibt, hat durch seine hohe Effizienz immer mehr an Bedeutung für DTCO Zyklen gewonnen. Mit Emulationen können komplexe Transistorstrukturen innerhalb von Sekunden generiert werden und neue Transistorgeometrien schnell, mithilfe von Bauteil- und Schaltungssimulationen, evaluiert werden. In dieser Arbeit wurde, zum ersten Mal, die Emulation von Herstellungsprozessen direkt in einem Level Set durch die Entwicklung eines geometrischen Advektionsalgorithmus ermöglicht. Dieser Algorithmus erlaubt es, große Veränderungen von Materialoberflächen in einem einzige Schritt zu modellieren.

Die Entwicklung fundamentaler Methoden und deren Implementierung in einem Prozesssimulator, ViennaPS, kombiniert physikalische Prozesssimulation mit effizienter Prozessemulation und erlaubt so eine ganzheitliche Beschreibung von modernen und potentiell zukünftigen Herstellungsverfahren. Daher konnte mit dieser Arbeit das fehlende Glied zwischen Simulation und Emulation geschaffen werden, welches das uneingeschränkte Zusammenwirken beider Methoden ermöglicht, um DTCO Zyklen und die Entdeckung neuartiger Halbleiterfertigungsmethoden zu beschleunigen.

Acknowledgement

Firstly, I want to thank Prof. Siegfried Selberherr for providing a working environment which harbours critical thought, lively discussions, and not only scientific but also personal progress.

Furthermore, I want to thank Dr. Lado Filipovic for being open to new ideas, for his help in formulating raw ideas into scientifically sound theories, and for making the pursuance of these ideas possible with supreme academic, organisational, and personal support. Without his supervision, this work would not have been possible.

Additionally, my gratitude goes to Paul Manstetten for lively, and sometimes almost heated, technical discussions which I believe lead to great professional improvement in my daily work, and to the creation of several lectures of the highest quality.

I do want to thank the entire staff of the Institute for Microelectronics for their support over the years, and especially Alex Toifl for his perseverance in perfecting even the basic foundation of our field which often sparked my own ambition, and Markus Kampl for his unshakeable ethics in developing reusable and open software which I have always found inspiring.

Finally, I want to thank my father who earned his doctoral degree at TU Wien almost 30 years ago and often provided a helpful outsider’s perspective on the scientific problems encountered in this work.

Contents

Abstract

Kurzfassung

List of Figures

List of Tables

List of Algorithms

1 Introduction

1.1 Semiconductor Fabrication Process Flow

1.2 Motivation and Research Goals

1.3 Outline of the Thesis

2 Numerical Modelling

2.1 Modelling of Reactor Regions

2.1.1 Reactor Scale Modelling

2.1.2 Feature Scale Modelling

2.2 Numerical Material Representations

2.2.1 Atomistic Modelling

2.2.2 Continuum Approach

2.3 Continuum Material Representations

2.3.1 Explicit Surfaces

2.3.2 Implicit Surfaces using the Level Set Method

2.3.2.1 The Narrow Band Method

2.3.2.2 The Sparse Field Method

2.3.2.3 Geometric Properties of Implicit Surfaces

2.3.2.4 Boolean Operations

2.3.2.5 Multiple Materials

2.3.3 Volume Representations

2.3.3.1 Tetrahedral Meshes

2.3.3.2 Cell-Based Meshes

2.4 Modelling Material Evolution

2.4.1 Evolution of Explicit Meshes

2.4.2 Iterative Level Set Advection

2.4.2.1 Surface Velocity Field

2.4.2.2 CFL Condition

2.4.2.3 Engquist-Osher Scheme

2.4.2.4 Lax-Friedrichs Scheme

2.4.3 Geometric Level Set Advection

2.4.3.1 Geometric Voxel Advection

2.4.3.2 Geometric Advection Distributions

2.4.3.3 Geometric Advection Algorithm

2.4.3.4 Adaptions for Specific Geometric Advection
Distributions

2.4.3.5 Geometric Advection of Multiple Materials

2.4.3.6 Time-varying Processes

2.4.4 Volume-Dependent Modelling

2.5 Summary

3 Surface Rate Calculation

3.1 Empirical Surface Rate Modelling

3.2 Chemical Surface Rate Modelling

3.2.1 Molecular Transport in Plasma Environments

3.2.2 Reactor Scale Transport

3.2.3 Feature Scale Transport

3.2.3.1 Boundary Conditions

3.2.3.2 Modelling Approaches

3.2.3.3 Top-Down Flux Calculation

3.2.3.4 Bottom-Up Flux Calculation

3.2.4 Molecular Interactions with the Surface

3.2.5 Chemical Reactions of Molecules on the Surface

3.3 Summary

4 Software Implementation

4.1 ViennaHRLE - Sparse Data Container

4.1.1 Data Structure

4.1.2 Initialisation

4.1.3 Data Access

4.2 ViennaLS - Level Set Library

4.2.1 Software Design

4.2.2 Geometry Creation

4.2.3 Conversion from Explicit Representations

4.2.3.1 Surface Meshes

4.2.3.2 Volume Meshes

4.2.4 Conversion to Explicit Representations

4.2.4.1 Disc Mesh

4.2.4.2 Segmented Surface Mesh

4.2.5 Geometry Analysis

4.2.5.1 Connected Components

4.2.5.2 Void and Stray Point Detection

4.2.5.3 Feature Detection

4.2.6 Iterative Advection

4.2.6.1 Velocity Calculation

4.2.6.2 Updating LS values

4.2.6.3 Rebuilding a Valid Sparse Field LS

4.2.7 Geometric Advection

4.2.7.1 Efficient Identification of Candidate Points

4.2.7.2 Limiting the Number of Contribute Points

4.3 ViennaCS - Cell Set Volume Data

4.4 ViennaRay - Transport Modelling

4.5 ViennaPS - Process Simulation

4.5.1 Modelling Framework

4.6 Summary

5 Process Modelling

5.1 Fabrication Steps

5.1.1 Chemical Vapour Deposition

5.1.1.1 Empirical Model

5.1.1.2 Physical Model

5.1.2 Epitaxial Growth

5.1.2.1 Empirical Model

5.1.2.2 Physical Model

5.1.3 Anisotropic Wet Etching

5.1.4 Physical Plasma Etch Models

5.1.4.1 Chlorine Plasma Etching

5.1.4.2 Fluorocarbon Plasma Etching

5.1.4.3 Sulphur Hexafluoride Plasma Etching

5.1.4.4 Hydrogen Bromine Plasma Etching

5.1.5 Gate Stack Etching Sequence

5.1.6 Bosch Process

5.1.6.1 DEM Sequence

5.1.6.2 DREM Sequence

5.1.6.3 DREAM Sequence

5.1.6.4 Empirical Model

5.1.6.5 Physical Model

5.2 Device Process Flows

5.2.1 22 nm FinFET

5.2.2 5 nm SRAM Cell

5.2.3 Beyond 5 nm Stacked Nanosheet FET

5.3 Summary

6 Summary and Outlook

A Calculating Filling Fractions from Level Set Values

A.1 2D Problem

A.2 3D Problem

B Geometric Modelling of Deep Reactive Ion Etching

B.1 Profile and Scallop Generation for the DEM Sequence

B.2 DREAM Sequence Model

Bibliography

List of Publications

Curriculum Vitae

List of Figures

1.1 FinFET of the 22 nm technology node with a single gate and three source and drain contacts, respectively. ©2012 IEEE [16]

1.2 FEOL process steps for the fabrication of a 22 nm FinFET.

2.1 Length scales of semiconductor manufacturing. In the top left, a single SRAM cell of the 5 nm node with a total size of tens of nanometres is shown. It is part of the larger array of SRAM cells with a size of several micrometres shown in the top right. A large number of these arrays and additional control circuits form the SRAM region of the processor shown in the bottom right ©2021 IEEE [24]. One edge of the entire SRAM region is not larger than a few millimetres. The final chip is not larger than one centimetre, a small part of the wafer shown in the bottom left which is 300 millimetres in diameter ©2020 IEEE [25].

2.2 Explicit surface describing a circle in two and a sphere in three dimensions with nodes in red and surface normals indicated by arrows.

2.3 Level set method on a full grid, storing \(\phi (\vec {x})\) for all grid points. The black line represents the location of the explicit surface.

2.4 An explicit surface (black) described implicitly using the narrow band method, storing only points for which \(|\phi (\vec {x})| \leq \frac {k}{2}\). Here, the LS for the commonly used value of \(k=5\) is shown.

2.5 Using the sparse field method, the explicit surface (black) is only represented by the grid points in the layer \(\mathcal {L}_0\), resulting in the smallest set of points possible to describe the surface.

2.6 Different types of normalisation of the implicit function \(\phi (\vec {x})\). The distance to the surface (black) a) using the Euclidean or \(\ell _2\) norm and b) using the Manhattan or \(\ell _1\) norm. Red points indicate active grid points, blue points indicate values smaller than 1. Green points indicate active grid points which are not necessary for the description of the surface, leading to an inefficient set of grid points.

2.7 Normal vector calculation at the grid point \(\vec {g}\) in the LS method using finite differences to approximate the normal at the closest surface point \(\vec {x}_{cp}\) by shifting the grid point a distance \(d\) in the normal direction. This distance is calculated directly from the level set value of \(\vec {g}\) using Eq. (2.15). Blue and red arrows indicate which distances were used to generate the LS values at the neighbouring grid points of \(\vec {g}\).

2.8 The closest surface points \(\vec {x}_{cp}\) generated from all grid points in the \(\mathcal {L}_0\) layer shown in the colour of the LS value of the original grid point. The normal vector approximated for each closest surface point is shown as an arrow starting at \(\vec {x}_{cp}\).

2.9 Boolean operation on the level set to generate the union of two surfaces represented implicitly. The new surface is created by taking the lowest LS value at every grid point. This automatically results in a valid LS describing the union of both surfaces.

2.10 Different position of a plane surface represented in a level set. The difference to the next position is indicated by red arrows. Grey points indicate the grid, black lines the surface and dashed green lines the correct position of the surface. The level set values of each row are shown to its right.

2.11 a) Thin layers (green) of a material cannot be represented accurately by the level set method. b) If the thin layer is defined on top of another material, as is the case in semiconductor fabrication processes, layer wrapping can be employed to achieve an accurate surface representation (purple) matching the explicit surfaces. The explicit material interfaces are indicated by thin black lines.

2.12 Level set layers representing different materials during an etch process of a thin layer (red) above a substrate (blue) both protected by a mask (green). The filled areas show the material if no layer wrapping is applied and the coloured lines show the corresponding LS when employing the layer wrapping approach. Voids in the corners of geometries (a), symmetric shrinking (b) and loss of sub grid materials (c) are all handled appropriately using this approach.

2.13 Comparison of a cell-based material and a sparse field LS. While the former is intrinsically associated with volume, level set representations describe an interface or boundary. However, both share common properties as they both represent a material boundary implicitly.

2.14 Relationship between the level set values and filling fractions for a) 1D and b) 2D representations. In 1D, the filling fraction (red) follows a straight line (dotted red) in the allowed interval \([0, 1]\), which is given by Eq. (2.28). In dimensions higher than \(1\), the relationship is dependent on the normal vector, where \(\gamma \) is the angle between the normal vector and a grid axis. In the interval \(\gamma = [0, \pi /2]\) the function is symmetric around \(\gamma =\pi /4\) and then repeats periodically.

2.15 When the nodes (red) of an explicit surface (black lines) describing a material (green) are moved, the result may include regions of non-physical self-intersections (red). These regions must be repaired using subsequent re-meshing steps requiring substantial computational effort.

2.16 Nodes (red), defining the initial material interface (black), are shifted by the surface normals (arrows) to move the surface outwards isotropically as would occur during conformal deposition. The nodes of the final interface (blue) are spaced differently, leading to many overlapping points in areas of concave curvature and widely spaced points in area of convex curvature.

2.17 Advection of a voxel-based explicit mesh for the emulation of an isotropic deposition process. The centre of each advection kernel is found by taking a filled voxel with a neighbouring empty cell and placing the centre of the kernel at their interface. Several deposition kernels (black circles) are used at the interface between the filled initial cells (blue) and empty cells to draw the new surface. All empty cells within a distribution are filled with the new material.

2.18 A geometric distribution (dashed red) describing isotropic growth, used to calculate the signed distance \(d_s\) for a candidate point \(\vec {P}_{cand}\) (blue) from one point of the initial surface \(\vec {P}_{cont}\) (red). The growth distance \(R_{iso}\) is equal for all directions of the distance vector \(\vec {v}\). The set of all initial points are shown in black and the set of all candidate points in orange.

2.19 Flowchart of the full geometric advection algorithm for a deposition process.

2.20 Visualisation of how the algorithm generates the LS describing the final surface from a point cloud of the initial surface.

3.1 Flowchart of the chemical models used to generate the surface velocity field \(\vec {V}(\vec {x})\) and the information they provide for the next step (see arrows). First, the distribution of molecules impinging on the surface is modelled, which produces the incoming flux at every point on the surface. This flux is then used to model interactions with the surface in order to find how molecules are distributed leading to the surface coverage for each particle type. Using the number of molecules present at each surface site, their chemical reactions with the substrate are modelled, finally leading to the surface rates and thus the velocity field describing the topographical change. Applying these velocities to the initial surface using a single iterative advection step results in the final surface and the cycle starts anew.

3.2 Schematic representation of the traversal of neutral molecules and ions through the reactor and feature scale regions. While the motion through the reactor scale is dominated by random collisions with other molecules, the path through the feature scale region is dominated by ballistic transport. The directional distribution of neutral atoms and molecules \(\Gamma _{neutral}\) (blue) and ions \(\Gamma _{ion}\) (red) entering the feature scale region is shown as blue and red arrows, respectively. The molecular entities will then traverse the feature scale region in straight lines, only colliding with the surface.

3.3 Schematic depiction of rays being traced from the source plane to the surface using reflective boundary conditions. Each ray describes either neutral molecules (blue) or ions (red), governed by the source distributions \(\Gamma _{neutral}\) and \(\Gamma _{ion}\), respectively. Diffuse and specular reflections are shown for neutral species and ions, respectively.

3.4 Two ways to approximate an implicit surface efficiently by explicit shapes on active grid points (black), in order to simplify intersection tests for ray tracing. (a) Tangential line segments used to form an explicit approximation of the surface, as described in [60]; (b) surface approximated by explicit circles centred at active grid points, as described in [148]. The line segments and circles are replaced by discs and spheres in three dimensions.

3.5 Schematic representation of the bottom-up flux calculation for modern transistor gate structures, using periodic boundary conditions, meaning the entire simulation domain is repeated at the boundaries. The black arrow indicates the direction used to find the direct flux incident on \(\vec {x}\) from a single particle source at \(\vec {x_\mathcal {P}}\) with a source distribution of \(\Gamma _{src}\). The flux of all visible source plane elements, indicated by the green arc, is summed to give the total direct flux on \(\vec {x}\).

3.6 Calculation of reflected or re-emitted fluxes using a bottom up technique with periodic simulation boundaries. The black arrow indicates the direction used to find the reflected and re-emitted flux incident on \(\vec {x}\) from a particle source at \(\vec {x’}\). The source distributions \(\Gamma _\text {refl}\) and \(\Gamma _\text {reem}\) define the flux emitted towards \(\vec {x}\). The total indirect flux at point \(\vec {x}\) is found by summing the flux from all visible surface points, highlighted by the blue arc.

3.7 The five mechanisms leading to a topography change of the surface in the ion-enhanced etch process example. 1. Passivating molecules form polymers on sidewalls (green), which may be removed again through 2. ion-enhanced etching. 3. During chemical etching the substrate reacts with an etchant forming volatile etch products which thermally desorb from the surface through evaporation. 4. Ion-enhanced etching increases the chemical etch rate by breaking up bonds in the substrate, enhancing the formation of volatile etch products. 5. Energetic ions collide with the substrate and break the surface bonds to remove material physically without a chemical etchant through ion sputtering.

4.1 Dependencies of the ViennaPS process simulation library on other software libraries for core functionalities. Additional features, which do not provide essential utilities but rather convenient additional functionality are connected using dashed lines. External libraries which were not developed in the course of this work are filled with a grey background and are labelled as external.

4.2 Surface of a triangle stored in the HRLE data structure, showing how the LS values are segmented into defined (yellow), undefined negative (blue), or undefined positive (red) points.

4.3 Internal representation of the HRLE data structure when storing a sparse field LS. Each dimension is run-length encoded separately and referenced into the next higher dimension using start indices. The defined values saved in the structure are stored sequentially in memory, allowing for fast sequential access.

4.4 Creation of a complex patterned substrate by (a) creating the convex hull of a point cloud to generate a cone and (b) combining numerous different cones with a plane surface using Boolean operations.

4.5 Conversion of a tetrahedral volume mesh into several surface meshes representing the future LS surfaces, respecting the layer wrapping strategy of Section 2.3.2.5.

4.6 Disc mesh used predominantly for efficient ray tracing. The mesh itself only contains points in space and the surface normals at these points. The discs are visualised to show that they form a closed surface appropriate for ray tracing.

4.7 The marching cubes algorithm creates a conformal triangulation of the implicit data. Nevertheless, it leads to thin and sharp triangles which are unfavourable for certain applications. The edges of the mesh triangles are shown in blue.

4.8 Using the segmentation of the HRLE structure, connected surface regions can be identified considering first neighbours. This allows for the identification of voids inside a material.

4.9 Voids inside a material properly marked by the presented algorithm. Red points refer to void points, while blue points refer to the substrate.

4.10 Curvature calculated directly in the LS for all defined values of the Stanford bunny geometry. The root of the absolute Gaussian curvature is shown in (b) to compare to the mean curvature in (a), where a negative sign denotes concave curvature.

4.11 Features of the Stanford bunny LS highlighted in red with the feature detection threshold set to \(\kappa = 110\).

4.12 Filling fractions for two different materials, represented using implicit volumes. The cells which contain both materials have two filling fractions to describe the percentage of the cell volume each material occupies.

4.13 Interface of the ViennaRay library for defining the properties of the simulation domain. The particle type is passed using the abstract base class rayParticle, so the particle type can be assigned dynamically during runtime. Custom particle types should always be inherited from rayParticleBase, which contains the functionality for accessing the copy constructor of the user-defined particle type.

4.14 Interface and inner workings of the modelling framework of the ViennaPS library. An object of the type psProcessModel is passed to the psProcess class which simulates the implemented model on the passed psDomain. This includes performing the ray tracing, executing the surface model and the volume model if they are defined. None of these are required, so emulation models can be carried out by, for example, only defining a surface model.

5.1 Resulting geometry of the geometric advection of a pinch-off CVD process used to generate insulating air-gaps in copper lines through the deposition of a dielectric.

5.2 Resulting geometry of the geometric advection of a CVD process.

5.3 Polysilicon deposition profiles after 150, 250 and 350 minutes from the simulation using the two precursor model (a)-(c), compared to experimental results (d)-(f) obtained from [188]. Reprinted with permission from [188]. Copyright 1993, American Vacuum Society.

5.4 Geometry resulting from the growth of epitaxial silicon (red) for the S/D regions on top of a silicon substrate (blue). The crystal planes for the characteristic facets are indicated using Miller indices. CC BY 4.0 [100]

5.5 SEG of silicon at the bottom of a via using dichlorosilane as a precursor. a) If there is not enough HCl available to clean the other materials, silicon will be deposited everywhere. b) Careful tuning of the feed gases results in crystalline growth only on the silicon substrate.

5.6 Wet etching of differently oriented silicon substrates with the same mask, resulting in entirely different geometries. The colours hint at the etch rate at every point on the surface, where blue corresponds to a low etch rate and red to a high one.

5.7 Active etching and deposition mechanics in Cl chemistries used to etch TiN: I. Chemical deposition of BN, II. Chemical etching through TiClx and NCly radicals, III. Ion-enhanced etching and IV. Ion sputtering through high energy ions.

5.8 Active etching and deposition mechanics in CF type chemistries used to etch poly-Si: I. Chemical deposition of carbon forming an SiC passivation layer, II. Chemical etching, III. Ion-enhanced etching and IV. Ion sputtering through high energy ions.

5.9 Sulphur with Fluoride (SF) type etching and deposition mechanics with additional CH2F2 feed gas. I. Line of sight deposition of a CF passivation layer; II. ion-enhanced etching; III. chemical etching; and IV. physical ion sputtering.

5.10 Two-dimensional trenches formed by etching silicon (pink) with a mask (black). The ion flux was kept constant at 1016cm-2s-1. In a)-c), the trenches were etched for 25 s with a constant etchant flux of 1.3x1016cm-2s-1, while the polymer (blue) concentration was varied: a)5x1015cm-2s-1, b)1016cm-2s-1 and c) 5x1016 cm-2s-1. In d)-f), the polymer flux was constant at 5x1015cm-2s-1 and the etchant flux was changed: d)5x1015cm-2s-1, e)2x1016cm-2s-1 and f) 5x1016 cm-2s-1.

5.11 Dominant etch mechanics during silicon etching using hydrogen bromide. I. Sidewall passivation proceeds though chemical deposition from the gas phase and II. Vertical etching is dominated by ion-enhanced etching.

5.12 HBr/O2 etching of Silicon (pink) with a mask (black) for 25 s. The ion flux was kept constant at 1016cm-2s-1. In a)-c), the Si was etched with a constant etchant flux of 1016cm-2s-1, while the polymer (blue) concentration was varied: a)1016cm-2s-1, b)3x1016cm-2s-1 and c) 5x1016 cm-2s-1. In d)-f), the polymer flux was constant at 1016cm-2s-1 and the etchant flux was changed: d)1015cm-2s-1, e)5x1015cm-2s-1 and f) 5x1016 cm-2s-1.

5.13 Gate stack geometry after important patterning steps, highlighting the importance of passivation layers throughout the process. The thick, protective layers formed during the poly-Si etch steps protect the material throughout the process.

5.14 One cycle of the DEM sequence to generate high aspect-ratio structures with the chemistries used for each step. For clarity, the second cycle of the sequence is shown.

5.15 One cycles of the DREM sequence where the etch step of the DEM sequence is split into a directional remove and an isotropic etch step. The length of the etch step can be adjusted to counter RIE lag.

5.16 DREAM sequence with the additional ashing step compared to the DREM sequence. The length of the ash step needs to be adjusted according to the length of the deposition step in order to properly remove the piled up polymer at the top opening.

5.17 Scallops for different values of \(f_t\): (a) \(f_t=1\) corresponding to perfect free molecular transport, (b) \(f_t=2\) corresponding to perfect diffusion-limited etching and (c) \(f_t=1.5\) corresponding to a combination of both transport phenomena. CC BY 4.0 [269]

5.18 (a) Starting from a spherical distribution, a lens distribution can be created by removing the centre part. The vector \(\vec {v}\) is translated to the remaining parts. (b) Using this lens distribution, a difference in vertical and lateral etch rate can be modeled for \(f_t = 1.5\) and \(f_l=0.5\). CC BY 4.0 [269]

5.19 (a) DEM process without tapering, but a decrease in scallop sizes down the feature. (b) Emulation of the same process with \(N_c=50\). CC BY 4.0 [269]

5.20 (a) Emulation of sausage-chain like structures using several DREM sequences, as well as longer intermittent isotropic etch steps. (b) SEM image of the sausage-chain pillars generated by the DREM process. The emulation was performed using 32 threads and took 14 minutes and 52 seconds to execute. 80 cycles of the DREM model were performed without tapering using the fitting parameters given in Table 5.3. In order to generate the isotropic etch sections, every 10th scallop’s isotropic etch depth was increased to \(d_{iso}=-1.0\). CC BY 4.0 [269]

5.21 DREAM Sequence simulations for \(N_c=100\) with different ash step times compared to experimental data. Only the ash time was varied as input for the DREAM model, while all other parameters were fixed with values provided in Table 5.4. CC BY 4.0 [269]

5.22 Cycle 13 of a CORE sequence, highlighting etching damage (green circles) of previous cycles due to a short oxidise step, which results in too thin passivation layers. These are then etched and additional features are etched into the scallops during subsequent etch steps.

5.23 FEOL processing steps for the fabrication of the 22 nm FinFET employing the RMG process flow.

5.24 (a)-(g) SRAM structure after the fabrication steps with physical models, highlighted in bold in Table 5.7. (h) Final SRAM structure, with high-k dielectric and metal gate (HKMG), spacer and ILD transparent to show the structure of the fins and S/D regions. ©2021 IEEE [283]

5.25 Critical process steps in the manufacture of the GAA transistor described in [285].

A.1 2D area calculation for a square cut by a straight line.

A.2 Volume calculation for a cube cut by a plane.

B.1 Fit of the DREAM Sequence model to experimental values of the etch depth ratio generated from trench depths for different ash times of the DREAM sequence presented in [268]. Experimental values are shown as blue error bars and the fitted model is shown as an orange line going from \(r_e=0\) to \(r_e=1\).

List of Tables

5.1 Model parameters of the physical models used to simulate the gate stack etching sequence with fluxes given in units of /(cm2 s). Main etch and over etch chemistries are indicated as ME and OE, respectively. All models were simulated using a pressure of 1.35 Pa with a bias voltage of 60 V for the plasma etch steps.

5.2 Fitting parameters for the model of the deposit-etch-multiple-times (DEM) sequence presented in [265].

5.3 Model parameters for the deposit-remove-etch-multiple-times (DREM) model used to generate the sausage-chain-like geometry in Fig. 5.20.

5.4 Model parameters for the deposit-remove-etch-ash-multiple-times (DREAM) sequence used for a series of via etch emulations with changing ashing time.

5.5 Input parameters to physical models used for each step of the clear-oxidise-remove-etch (CORE) sequence with fluxes given in units of /(cm2 s).

5.6 Sequence of process steps used to generate the 22 nm FinFET structure and the models used. Geometric deposition and etching refers to a model executed by the algorithm presented in Section 2.4.3, while SLLF Epitaxial Growth refers to the physical epitaxial model presented in Section 5.1.2.1. chemical mechanical planarisation (CMP) is modelled by simply clipping all level sets by a plane using Boolean operations.

5.7 Process steps used to generate the final static random access memory (SRAM) structure and the corresponding modelling approaches. The bold text shows which steps were applied using physical models.

5.8 Runtime for the simulation of each modelled process step. Physical models are shown in bold text. The simulation was carried out on an AMD Ryzen3950X processor and took less than 16 minutes to complete, where more than 85% of the simulation time was consumed for the evaluation of the physical models.

5.9 Emulation models used to simulate the fabrication of a gate all-around (GAA) field-effect transistor (FET) anticipated for applications beyond the 5 nm technology node.

List of Algorithms

4.1 Building connectivity information for a level set (LS) surface.

4.2 Identification of the material at the grid point \(\vec {g}\) from an array of LSs.

4.3 Algorithm for the change in LS value for a grid point close to several material interfaces.

4.4 Adding, removing, and updating grid points after advection to form a valid sparse field LS.

4.5 Efficiently identify candidate points by marching over the surface by looking at direct neighbours of active points.