The scaling of CMOS technology is facing fundamental physical and financial limitations. The increasing demand for cost effective electronics with enhanced performance has accelerated the investigation of new concepts and alternative technologies to replace or at least to supplement CMOS. Standby power dissipation due to leakage has become a major challenge of today’s CMOS VLSI circuits. Introducing non-volatility into CMOS circuits is a promising solution to overcome this issue. Especially, emerging non-volatile resistance switching memory (memristive) devices, which are promising candidates for future universal memory, are very attractive. They also have a great potential to lead novel applications beyond the non-volatile memory by the possibility to provide novel functional properties in computing as well as sensing that are not accessible in conventional systems.
In this thesis, stateful logic systems are studied at the device, circuit, and architecture levels. Stateful logic enables memristive devices to serve simultaneously as non-volatile memory (latches) and computing units (gates). Therefore, it inherently realizes non-volatile logic-in-memory circuits with zero-standby power and opens the door for a shift away from the Von Neumann architecture. Besides memory and logic applications also analog and sensing applications are feasible. The unique properties of the memristive devices are exploited to introduce novel non-volatile charge- and flux-based sensing schemes.
Because of unlimited endurance and CMOS compatibility, the spin-transfer torque magnetic tunnel junction (STT-MTJ) is proposed as a very favorable device for stateful logic. In addition, it is shown that unlike other devices (e.g. memristors based on titanium dioxide), the STT-MTJ-based logic gates do not show any state drift error accumulation due to the magnetic bistability. As a result, the need for refreshing circuits in stateful logic circuits is eliminated. A new STT-MTJ-based implication logic gate with a current-controlled circuit topology is proposed. Reliability modeling and analysis of the stateful logic architectures for optimization and comparison of different stateful logic gates are presented. It is demonstrated that the implication gate outperforms state-of-the-art gates in terms of reliability and energy consumption. However, an inherent structural asymmetry of the proposed implication logic gate causes significant limitations for the non-volatile fan-out and the flexibility of the computations. Thanks to the easy integration of MTJs on top of a CMOS circuit, an elegant solution is presented to address this asymmetry issue by using the access transistors of one-transistor/one-MTJ (1T/1MTJ) cells as voltage-controlled resistors. Because a 1T/1MTJ cell is the basic element of the commercialized STT-operated magnetoresistive random-access memory (MRAM), the proposed implementation becomes generalizable to a stateful STT-MRAM logic architecture. This logic architecture is computationally complete, has a simple circuit structure, delocalizes computational executions, addresses the fan-out issue, and eliminates the need for intermediate circuitry. It also enables parallel computations. Advantages of the MRAM-based stateful logic are demonstrated at the level of logic functions executions and are proven at the circuit level by considering MRAM-based non-volatile half adder and full adder implementations.
In addition novel charge- and flux-based sensing schemes are proposed in this thesis by using the unique ability of memristive devices to record the historic profile of the applied current/voltage. The memristive sensing method reduces the capacitance, inductance, and power measurements to a (simple) resistance measurement. Using the pecularities of the domain wall dynamics depending on the shape and the geometry of a domain wall spintronic memristor, the possibility of charge-based capacitance and flux-based inductance sensing is demonstrated, when two different spatial shapes of the domain wall spintronic memristors are employed. The memristive sensing method is also suitable for measuring time-varying inductances and capacitances and thus shows great potential for use in inductive and capacitive sensor applications.