Abstract
Kurte
Acknowledgment
Contents
List of Figures
List of Tables
1 Introduction
1.1 Motivation
1.2 Scope of the Thesis
1.3 Thesis Outline
2 Fundamentals of Memristive Devices and Systems
2.1 Theory
2.2 Physical Implementation
2.3 Memristive Device Modeling
3 TiO
-Based Memristive Stateful Logic Gates
3.1 Overview
3.2 Implication Logic
3.3 Modeling
3.4 Simulation Results
3.5 Summary
4 Spintronic Memristive Stateful Logic Gates
4.1 Overview
4.2 Implication Logic Using DW-TMR Memristors
4.3 Novel Implication Logic Gates Using STT-MTJs
4.4 Reprogrammable Logic Using STT-MTJs
4.5 Comparison of Improved Implication and Reprogrammable Gates
4.6 Effect of the MTJ Device Parameters on Reliability
4.7 Summary
5 Stateful STT-MRAM Arrays for Large-Scale Logic Circuits
5.1 Overview
5.2 Implementation of the Reprogrammable Architecture
5.3 Implementation of the Improved Implication Architecture
5.4 Complex Logic Functions Using Improved Symmetric Implication
5.5 Toward High Performance STT-MRAM-Based Stateful Logic
5.6 Summary
6 Memristive Charge- and Flux-Based Sensing
6.1 Overview
6.2 Memristive Sensing Principles
6.3 Memristive Devices for Sensing
6.4 Sensitivity
6.5 Summary
7 Conclusions and Outlook
A Implication-Based Full Adder
A.1 NIMP-Based Full Adder
A.2 IMP-Based Full Adder
Bibliography
List of Publications
Publications in Scientific Journals
Chapter in Book
Patents
Publications in Conference Proceedings
Curriculum Vitae