1.3  Thesis Outline

The thesis is organized as follows. Chapter 2 reviews the background knowledge on memristive devices and systems. TiO-based stateful logic gates are studied in Chapter 3. Chapter 4 concentrates on spintronic stateful logic devices and circuits. A new improved implication logic gate is proposed, analyzed, and compared to the existing logic gates. Its generalization for large-scale logic application and parallelization for high performance computing is described in Chapter 5. Chapter 6 describes new memristive sensing schemes and explains how spintronic memristors can be used for coincident charge- and flux-based sensing. Finally, Chapter 7 concludes the thesis with a brief summary and an an outlook to possible future development.